| Age | Commit message (Expand) | Author |
|---|---|---|
| 2021-03-11 | Import memory files inline for Verilog generation (#1805) | Carlos Eduardo |
| 2020-11-11 | Add custom mdoc modifier for emitted Verilog (#1666) | Jack Koenig |
| 2020-08-21 | Added website docs and mdoc. (#1560) | Adam Izraelevitz |
| 2020-02-13 | Fix mill build (#1324) | Sequencer |
| 2019-01-18 | Remove bin (#991) | Richard Lin |
| 2018-07-05 | Ignore eclipse temporaries | Richard Lin |
| 2018-06-29 | Add Emacs temporaries, backups to .gitignore (#837) | Schuyler Eldridge |
| 2017-12-14 | Fix a few compiler warnings (#738) | Jack Koenig |
| 2016-10-28 | Add firrtl.jar to .gitignore | Andrew Waterman |
| 2016-02-24 | changing build.sbt to prepare for chisel3 distribution | chick |
| 2015-12-15 | Fix some nits: add that line to .gitignore that keeps coming back, do paralle... | ducky |
| 2015-07-24 | Use CHISEL_BIN, CX, generalize generated/targetDir, convert filter to python,... | Jim Lawson |
 |
index : chiselX | |
| Chisel with SFC compatibility |
| summaryrefslogtreecommitdiff |
path: root/.gitignore