summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
Diffstat (limited to 'src')
-rw-r--r--src/main/scala/chisel3/internal/firrtl/Emitter.scala4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/main/scala/chisel3/internal/firrtl/Emitter.scala b/src/main/scala/chisel3/internal/firrtl/Emitter.scala
index a559ddc5..9c766ec3 100644
--- a/src/main/scala/chisel3/internal/firrtl/Emitter.scala
+++ b/src/main/scala/chisel3/internal/firrtl/Emitter.scala
@@ -102,7 +102,9 @@ private class Emitter(circuit: Circuit) {
private def unindent() { require(indentLevel > 0); indentLevel -= 1 }
private def withIndent(f: => Unit) { indent(); f; unindent() }
- private val res = new StringBuilder(s";${Driver.chiselVersionString}\ncircuit ${circuit.name} : ")
+ private val res = new StringBuilder()
+ res ++= s";${Driver.chiselVersionString}\n"
+ res ++= "circuit ${circuit.name} : "
withIndent { circuit.components.foreach(c => res ++= emit(c)) }
res ++= newline
}