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Diffstat (limited to 'src')
| -rw-r--r-- | src/main/scala/Chisel/Core.scala | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/main/scala/Chisel/Core.scala b/src/main/scala/Chisel/Core.scala index fce33253..22bb555c 100644 --- a/src/main/scala/Chisel/Core.scala +++ b/src/main/scala/Chisel/Core.scala @@ -488,6 +488,9 @@ class Vec[T <: Data](elts: Iterable[T], dirArg: Direction = NO_DIR) extends Aggr def <> (that: Iterable[T]): Unit = this <> Vec(that).asInstanceOf[Data] + def := (that: Iterable[T]): Unit = + this := Vec(that).asInstanceOf[Data] + override def isReg = elt0.isReg override def isFlip = { val isSubFlip = elt0.isFlip |