1 files changed, 36 insertions, 2 deletions
diff --git a/src/test/scala/chiselTests/BlackBoxImpl.scala b/src/test/scala/chiselTests/BlackBoxImpl.scala
index a6784909..fbfce58b 100644
--- a/src/test/scala/chiselTests/BlackBoxImpl.scala
+++ b/src/test/scala/chiselTests/BlackBoxImpl.scala
@@ -5,7 +5,7 @@ package chiselTests
 import java.io.File
 
 import chisel3._
-import chisel3.util.{HasBlackBoxInline, HasBlackBoxResource}
+import chisel3.util.{HasBlackBoxInline, HasBlackBoxResource, HasBlackBoxPath}
 import firrtl.FirrtlExecutionSuccess
 import org.scalacheck.Test.Failed
 import org.scalatest.{FreeSpec, Matchers, Succeeded}
@@ -47,7 +47,16 @@ class BlackBoxMinus extends HasBlackBoxResource {
     val in2 = Input(UInt(16.W))
     val out = Output(UInt(16.W))
   })
-  setResource("/chisel3/BlackBoxTest.v")
+  addResource("/chisel3/BlackBoxTest.v")
+}
+
+class BlackBoxMinusPath extends HasBlackBoxPath {
+  val io = IO(new Bundle {
+    val in1 = Input(UInt(16.W))
+    val in2 = Input(UInt(16.W))
+    val out = Output(UInt(16.W))
+  })
+  addPath(new File("src/test/resources/chisel3/BlackBoxTest.v").getCanonicalPath)
 }
 
 class UsesBlackBoxMinusViaResource extends Module {
@@ -64,6 +73,20 @@ class UsesBlackBoxMinusViaResource extends Module {
   io.out := mod0.io.out
 }
 
+class UsesBlackBoxMinusViaPath extends Module {
+  val io = IO(new Bundle {
+    val in1 = Input(UInt(16.W))
+    val in2 = Input(UInt(16.W))
+    val out = Output(UInt(16.W))
+  })
+
+  val mod0 = Module(new BlackBoxMinusPath)
+
+  mod0.io.in1 := io.in1
+  mod0.io.in2 := io.in2
+  io.out := mod0.io.out
+}
+
 class BlackBoxImplSpec extends FreeSpec with Matchers {
   val targetDir = "test_run_dir"
   "BlackBox can have verilator source implementation" - {
@@ -89,5 +112,16 @@ class BlackBoxImplSpec extends FreeSpec with Matchers {
           Failed
       }
     }
+    "Implementations can be contained in arbitrary files" in {
+      Driver.execute(Array("-X", "low", "--target-dir", targetDir), () => new UsesBlackBoxMinusViaPath) match {
+        case ChiselExecutionSuccess(_, _, Some(_: FirrtlExecutionSuccess)) =>
+          val verilogOutput = new File(targetDir, "BlackBoxTest.v")
+          verilogOutput.exists() should be (true)
+          verilogOutput.delete()
+          Succeeded
+        case _ =>
+          Failed
+      }
+    }
   }
 }