diff options
Diffstat (limited to 'src/test')
| -rw-r--r-- | src/test/scala/chiselTests/AnalogIntegrationSpec.scala | 4 | ||||
| -rw-r--r-- | src/test/scala/chiselTests/BlackBox.scala | 28 | ||||
| -rw-r--r-- | src/test/scala/chiselTests/CompatibilitySpec.scala | 14 |
3 files changed, 46 insertions, 0 deletions
diff --git a/src/test/scala/chiselTests/AnalogIntegrationSpec.scala b/src/test/scala/chiselTests/AnalogIntegrationSpec.scala index 3af54d1d..7478f2eb 100644 --- a/src/test/scala/chiselTests/AnalogIntegrationSpec.scala +++ b/src/test/scala/chiselTests/AnalogIntegrationSpec.scala @@ -31,6 +31,10 @@ class AnalogBlackBox(index: Int) extends BlackBox(Map("index" -> index)) { val io = IO(new AnalogBlackBoxIO(1)) } +// This interface exists to give a common interface type for AnalogBlackBoxModule and +// AnalogBlackBoxWrapper. This is the standard way to deal with the deprecation and removal of the +// Module.io virtual method (same for BlackBox.io). +// See https://github.com/freechipsproject/chisel3/pull/1550 for more information trait AnalogBlackBoxModuleIntf extends Module { def io: AnalogBlackBoxIO } diff --git a/src/test/scala/chiselTests/BlackBox.scala b/src/test/scala/chiselTests/BlackBox.scala index 8ae7d6ee..d3d52f96 100644 --- a/src/test/scala/chiselTests/BlackBox.scala +++ b/src/test/scala/chiselTests/BlackBox.scala @@ -15,6 +15,16 @@ class BlackBoxInverter extends BlackBox { }) } +// Due to the removal of "val io", this technically works +// This style is discouraged, please use "val io" +class BlackBoxInverterSuggestName extends BlackBox { + override def desiredName: String = "BlackBoxInverter" + val foo = IO(new Bundle() { + val in = Input(Bool()) + val out = Output(Bool()) + }).suggestName("io") +} + class BlackBoxPassthrough extends BlackBox { val io = IO(new Bundle() { val in = Input(Bool()) @@ -50,6 +60,18 @@ class BlackBoxTester extends BasicTester { stop() } +class BlackBoxTesterSuggestName extends BasicTester { + val blackBoxPos = Module(new BlackBoxInverterSuggestName) + val blackBoxNeg = Module(new BlackBoxInverterSuggestName) + + blackBoxPos.foo.in := 1.U + blackBoxNeg.foo.in := 0.U + + assert(blackBoxNeg.foo.out === 1.U) + assert(blackBoxPos.foo.out === 0.U) + stop() +} + class BlackBoxFlipTester extends BasicTester { val blackBox = Module(new BlackBoxPassthrough2) @@ -187,4 +209,10 @@ class BlackBoxSpec extends ChiselFlatSpec { } ) } + "A BlackBoxed using suggestName(\"io\")" should "work (but don't do this)" in { + assertTesterPasses( + {new BlackBoxTesterSuggestName}, + Seq("/chisel3/BlackBoxTest.v"), + TesterDriver.verilatorOnly) + } } diff --git a/src/test/scala/chiselTests/CompatibilitySpec.scala b/src/test/scala/chiselTests/CompatibilitySpec.scala index 50213d4d..6a77c821 100644 --- a/src/test/scala/chiselTests/CompatibilitySpec.scala +++ b/src/test/scala/chiselTests/CompatibilitySpec.scala @@ -239,6 +239,20 @@ class CompatibiltySpec extends ChiselFlatSpec with ScalaCheckDrivenPropertyCheck ChiselStage.elaborate { new RequireIOWrapModule() } } + "A Module without val io" should "throw an exception" in { + class ModuleWithoutValIO extends Module { + val foo = new Bundle { + val in = UInt(width = 32).asInput + val out = Bool().asOutput + } + foo.out := foo.in(1) + } + val e = intercept[Exception]( + ChiselStage.elaborate { new ModuleWithoutValIO } + ) + e.getMessage should include("must have a 'val io' Bundle") + } + "A Module connecting output as source to input as sink when compiled with the Chisel compatibility package" should "not throw an exception" in { class SimpleModule extends Module { |
