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Diffstat (limited to 'src/test/scala/chiselTests')
| -rw-r--r-- | src/test/scala/chiselTests/ChiselSpec.scala | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/src/test/scala/chiselTests/ChiselSpec.scala b/src/test/scala/chiselTests/ChiselSpec.scala index e50f26e8..eb3ec3e6 100644 --- a/src/test/scala/chiselTests/ChiselSpec.scala +++ b/src/test/scala/chiselTests/ChiselSpec.scala @@ -10,7 +10,7 @@ import chisel3._ import chisel3.stage.{ChiselGeneratorAnnotation, ChiselStage} import chisel3.testers._ import firrtl.{AnnotationSeq, CommonOptions, EmittedVerilogCircuitAnnotation, ExecutionOptionsManager, FirrtlExecutionFailure, FirrtlExecutionSuccess, HasFirrtlOptions} -import firrtl.annotations.DeletedAnnotation +import firrtl.annotations.{Annotation, DeletedAnnotation} import firrtl.util.BackendCompilationUtilities import java.io.ByteArrayOutputStream import java.security.Permission @@ -26,7 +26,11 @@ trait ChiselRunners extends Assertions with BackendCompilationUtilities { additionalVResources: Seq[String] = Seq(), annotations: AnnotationSeq = Seq() ): Boolean = { - TesterDriver.execute(() => t, additionalVResources, annotations) + // Change this to enable Treadle as a backend + val defaultBackend = chisel3.testers.TesterDriver.defaultBackend + val hasBackend = TestUtils.containsBackend(annotations) + val annos: Seq[Annotation] = if (hasBackend) annotations else defaultBackend +: annotations + TesterDriver.execute(() => t, additionalVResources, annos) } def assertTesterPasses(t: => BasicTester, additionalVResources: Seq[String] = Seq(), |