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Diffstat (limited to 'src/test/scala/chiselTests/PrintableSpec.scala')
-rw-r--r--src/test/scala/chiselTests/PrintableSpec.scala8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/test/scala/chiselTests/PrintableSpec.scala b/src/test/scala/chiselTests/PrintableSpec.scala
index 62784cff..5f58429e 100644
--- a/src/test/scala/chiselTests/PrintableSpec.scala
+++ b/src/test/scala/chiselTests/PrintableSpec.scala
@@ -101,9 +101,9 @@ class PrintableSpec extends FlatSpec with Matchers {
// Submodule IO is a subtle issue because the Chisel element has a different
// parent module
class MySubModule extends Module {
- val io = new Bundle {
+ val io = IO(new Bundle {
val fizz = UInt(32.W)
- }
+ })
}
class MyBundle extends Bundle {
val foo = UInt(32.W)
@@ -128,9 +128,9 @@ class PrintableSpec extends FlatSpec with Matchers {
}
it should "handle printing ports of submodules" in {
class MySubModule extends Module {
- val io = new Bundle {
+ val io = IO(new Bundle {
val fizz = UInt(32.W)
- }
+ })
}
class MyModule extends BasicTester {
val myInst = Module(new MySubModule)