summaryrefslogtreecommitdiff
path: root/src/test/scala/chiselTests/Module.scala
diff options
context:
space:
mode:
Diffstat (limited to 'src/test/scala/chiselTests/Module.scala')
-rw-r--r--src/test/scala/chiselTests/Module.scala27
1 files changed, 14 insertions, 13 deletions
diff --git a/src/test/scala/chiselTests/Module.scala b/src/test/scala/chiselTests/Module.scala
index 88ba795b..7a4050db 100644
--- a/src/test/scala/chiselTests/Module.scala
+++ b/src/test/scala/chiselTests/Module.scala
@@ -1,23 +1,24 @@
// See LICENSE for license details.
package chiselTests
-import Chisel._
+
+import chisel3._
class SimpleIO extends Bundle {
- val in = UInt(INPUT, 32)
- val out = UInt(OUTPUT, 32)
+ val in = Input(UInt.width(32))
+ val out = Output(UInt.width(32))
}
class PlusOne extends Module {
- val io = new SimpleIO
- io.out := io.in + UInt(1)
+ val io = IO(new SimpleIO)
+ io.out := io.in + 1.asUInt
}
class ModuleVec(val n: Int) extends Module {
- val io = new Bundle {
- val ins = Vec(n, UInt(INPUT, 32))
- val outs = Vec(n, UInt(OUTPUT, 32))
- }
+ val io = IO(new Bundle {
+ val ins = Input(Vec(n, UInt(32)))
+ val outs = Output(Vec(n, UInt(32)))
+ })
val pluses = Vec.fill(n){ Module(new PlusOne).io }
for (i <- 0 until n) {
pluses(i).in := io.ins(i)
@@ -39,8 +40,8 @@ class ModuleVecTester(c: ModuleVec) extends Tester(c) {
*/
class ModuleWire extends Module {
- val io = new SimpleIO
- val inc = Wire(Module(new PlusOne).io)
+ val io = IO(new SimpleIO)
+ val inc = Wire(Module(new PlusOne).io.chiselCloneType)
inc.in := io.in
io.out := inc.out
}
@@ -57,10 +58,10 @@ class ModuleWireTester(c: ModuleWire) extends Tester(c) {
*/
class ModuleWhen extends Module {
- val io = new Bundle {
+ val io = IO(new Bundle {
val s = new SimpleIO
val en = Bool()
- }
+ })
when(io.en) {
val inc = Module(new PlusOne).io
inc.in := io.s.in