1 files changed, 46 insertions, 0 deletions
diff --git a/src/test/scala/chiselTests/LFSR16.scala b/src/test/scala/chiselTests/LFSR16.scala
new file mode 100644
index 00000000..dcc3a403
--- /dev/null
+++ b/src/test/scala/chiselTests/LFSR16.scala
@@ -0,0 +1,46 @@
+// See LICENSE for license details.
+
+package chiselTests
+import Chisel._
+import Chisel.testers.BasicTester
+
+class LFSR16 extends Module {
+  val io = new Bundle {
+    val inc = Bool(INPUT)
+    val out = UInt(OUTPUT, 16)
+  }
+  val res = Reg(init = UInt(1, 16))
+  when (io.inc) { 
+    val nxt_res = Cat(res(0)^res(2)^res(3)^res(5), res(15,1)) 
+    res := nxt_res
+  }
+  io.out := res
+}
+
+
+/*
+class LFSR16Tester(c: LFSR16) extends Tester(c) {
+  var res = 1
+  for (t <- 0 until 16) {
+    val inc = rnd.nextInt(2)
+    poke(c.io.inc, inc)
+    step(1)
+    if (inc == 1) {
+      val bit = ((res >> 0) ^ (res >> 2) ^ (res >> 3) ^ (res >> 5) ) & 1;
+      res = (res >> 1) | (bit << 15);
+    }
+    expect(c.io.out, res)
+  }
+}
+*/
+
+//TODO: Use chisel.util version instead?
+
+class LFSRSpec extends ChiselPropSpec {
+  
+  property("LFSR16 should elaborate") {
+    elaborate { new LFSR16 }
+  }
+
+  ignore("LFSR16 should return the correct result") { }
+}