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Diffstat (limited to 'src/test/scala/chiselTests/EnableShiftRegister.scala')
-rw-r--r--src/test/scala/chiselTests/EnableShiftRegister.scala10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/test/scala/chiselTests/EnableShiftRegister.scala b/src/test/scala/chiselTests/EnableShiftRegister.scala
index 6600df2a..11e8b70b 100644
--- a/src/test/scala/chiselTests/EnableShiftRegister.scala
+++ b/src/test/scala/chiselTests/EnableShiftRegister.scala
@@ -5,11 +5,11 @@ import Chisel._
import Chisel.testers.BasicTester
class EnableShiftRegister extends Module {
- val io = new Bundle {
- val in = UInt(INPUT, 4)
- val shift = Bool(INPUT)
- val out = UInt(OUTPUT, 4)
- }
+ val io = IO(new Bundle {
+ val in = Input(UInt(4))
+ val shift = Input(Bool())
+ val out = Output(UInt(4))
+ })
val r0 = Reg(init = UInt(0, 4))
val r1 = Reg(init = UInt(0, 4))
val r2 = Reg(init = UInt(0, 4))