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-rw-r--r--src/test/scala/chiselTests/CompatibilitySpec.scala12
1 files changed, 12 insertions, 0 deletions
diff --git a/src/test/scala/chiselTests/CompatibilitySpec.scala b/src/test/scala/chiselTests/CompatibilitySpec.scala
index c7a68e7c..2d4ad517 100644
--- a/src/test/scala/chiselTests/CompatibilitySpec.scala
+++ b/src/test/scala/chiselTests/CompatibilitySpec.scala
@@ -451,6 +451,18 @@ class CompatibiltySpec extends ChiselFlatSpec with ScalaCheckDrivenPropertyCheck
ChiselStage.elaborate(new Foo)
}
+ it should "support data-types of mixed directionality" in {
+ class Foo extends Module {
+ val io = IO(new Bundle {})
+ val tpe = new Bundle { val foo = UInt(OUTPUT, width = 4); val bar = UInt(width = 4) }
+ // NOTE for some reason, the old bug this hit did not occur when `tpe` is inlined
+ val mem = SeqMem(tpe, 8)
+ mem(3.U)
+
+ }
+ ChiselStage.elaborate((new Foo))
+ }
+
behavior of "debug"
it should "still exist" in {