diff options
Diffstat (limited to 'src/test/scala/chiselTests/BlackBox.scala')
| -rw-r--r-- | src/test/scala/chiselTests/BlackBox.scala | 87 |
1 files changed, 60 insertions, 27 deletions
diff --git a/src/test/scala/chiselTests/BlackBox.scala b/src/test/scala/chiselTests/BlackBox.scala index 344754e1..d42cd791 100644 --- a/src/test/scala/chiselTests/BlackBox.scala +++ b/src/test/scala/chiselTests/BlackBox.scala @@ -6,6 +6,7 @@ import java.io.File import org.scalatest._ import chisel3._ +import chisel3.experimental._ import chisel3.testers.BasicTester import chisel3.util._ //import chisel3.core.ExplicitCompileOptions.Strict @@ -36,11 +37,11 @@ class BlackBoxTester extends BasicTester { val blackBoxPos = Module(new BlackBoxInverter) val blackBoxNeg = Module(new BlackBoxInverter) - blackBoxPos.io.in := UInt(1) - blackBoxNeg.io.in := UInt(0) + blackBoxPos.io.in := 1.U + blackBoxNeg.io.in := 0.U - assert(blackBoxNeg.io.out === UInt(1)) - assert(blackBoxPos.io.out === UInt(0)) + assert(blackBoxNeg.io.out === 1.U) + assert(blackBoxPos.io.out === 0.U) stop() } @@ -55,15 +56,15 @@ class MultiBlackBoxTester extends BasicTester { val blackBoxPassPos = Module(new BlackBoxPassthrough) val blackBoxPassNeg = Module(new BlackBoxPassthrough) - blackBoxInvPos.io.in := UInt(1) - blackBoxInvNeg.io.in := UInt(0) - blackBoxPassPos.io.in := UInt(1) - blackBoxPassNeg.io.in := UInt(0) + blackBoxInvPos.io.in := 1.U + blackBoxInvNeg.io.in := 0.U + blackBoxPassPos.io.in := 1.U + blackBoxPassNeg.io.in := 0.U - assert(blackBoxInvNeg.io.out === UInt(1)) - assert(blackBoxInvPos.io.out === UInt(0)) - assert(blackBoxPassNeg.io.out === UInt(0)) - assert(blackBoxPassPos.io.out === UInt(1)) + assert(blackBoxInvNeg.io.out === 1.U) + assert(blackBoxInvPos.io.out === 0.U) + assert(blackBoxPassNeg.io.out === 0.U) + assert(blackBoxPassPos.io.out === 1.U) stop() } @@ -71,40 +72,68 @@ class BlackBoxWithClockTester extends BasicTester { val blackBox = Module(new BlackBoxRegister) val model = Reg(Bool()) - val (cycles, end) = Counter(Bool(true), 15) + val (cycles, end) = Counter(true.B, 15) val impetus = cycles(0) blackBox.io.clock := clock blackBox.io.in := impetus model := impetus - when(cycles > UInt(0)) { + when(cycles > 0.U) { assert(blackBox.io.out === model) } when(end) { stop() } } -/* -// Must determine how to handle parameterized Verilog -class BlackBoxConstant(value: Int) extends BlackBox { - val io = IO(new Bundle() { - val out = Output(UInt(width=log2Up(value))) +class BlackBoxConstant(value: Int) extends BlackBox( + Map("VALUE" -> value, "WIDTH" -> log2Up(value + 1))) { + require(value >= 0, "value must be a UInt!") + val io = IO(new Bundle { + val out = UInt(log2Up(value + 1).W).asOutput }) - override val name = s"#(WIDTH=${log2Up(value)},VALUE=$value) " } -class BlackBoxWithParamsTester extends BasicTester { - val blackBoxOne = Module(new BlackBoxConstant(1)) - val blackBoxFour = Module(new BlackBoxConstant(4)) +class BlackBoxStringParam(str: String) extends BlackBox(Map("STRING" -> str)) { + val io = IO(new Bundle { + val out = UInt(32.W) + }) +} + +class BlackBoxRealParam(dbl: Double) extends BlackBox(Map("REAL" -> dbl)) { + val io = IO(new Bundle { + val out = UInt(64.W) + }) +} - val (cycles, end) = Counter(Bool(true), 4) +class BlackBoxTypeParam(w: Int, raw: String) extends BlackBox(Map("T" -> RawParam(raw))) { + val io = IO(new Bundle { + val out = UInt(w.W) + }) +} - assert(blackBoxOne.io.out === UInt(1)) - assert(blackBoxFour.io.out === UInt(4)) +class BlackBoxWithParamsTester extends BasicTester { + val blackBoxOne = Module(new BlackBoxConstant(1)) + val blackBoxFour = Module(new BlackBoxConstant(4)) + val blackBoxStringParamOne = Module(new BlackBoxStringParam("one")) + val blackBoxStringParamTwo = Module(new BlackBoxStringParam("two")) + val blackBoxRealParamOne = Module(new BlackBoxRealParam(1.0)) + val blackBoxRealParamNeg = Module(new BlackBoxRealParam(-1.0)) + val blackBoxTypeParamBit = Module(new BlackBoxTypeParam(1, "bit")) + val blackBoxTypeParamWord = Module(new BlackBoxTypeParam(32, "bit [31:0]")) + + val (cycles, end) = Counter(true.B, 4) + + assert(blackBoxOne.io.out === 1.U) + assert(blackBoxFour.io.out === 4.U) + assert(blackBoxStringParamOne.io.out === 1.U) + assert(blackBoxStringParamTwo.io.out === 2.U) + assert(blackBoxRealParamOne.io.out === 0x3ff0000000000000L.U) + assert(blackBoxRealParamNeg.io.out === BigInt("bff0000000000000", 16).U) + assert(blackBoxTypeParamBit.io.out === 1.U) + assert(blackBoxTypeParamWord.io.out === "hdeadbeef".U(32.W)) when(end) { stop() } } -*/ class BlackBoxSpec extends ChiselFlatSpec { "A BlackBoxed inverter" should "work" in { @@ -119,4 +148,8 @@ class BlackBoxSpec extends ChiselFlatSpec { assertTesterPasses({ new BlackBoxWithClockTester }, Seq("/BlackBoxTest.v")) } + "BlackBoxes with parameters" should "work" in { + assertTesterPasses({ new BlackBoxWithParamsTester }, + Seq("/BlackBoxTest.v")) + } } |
