diff options
Diffstat (limited to 'src/main')
| -rw-r--r-- | src/main/resources/chisel3/Makefile (renamed from src/main/resources/Makefile) | 0 | ||||
| -rw-r--r-- | src/main/resources/chisel3/top.cpp (renamed from src/main/resources/top.cpp) | 0 | ||||
| -rw-r--r-- | src/main/scala/chisel3/testers/TesterDriver.scala | 2 |
3 files changed, 1 insertions, 1 deletions
diff --git a/src/main/resources/Makefile b/src/main/resources/chisel3/Makefile index 221179a3..221179a3 100644 --- a/src/main/resources/Makefile +++ b/src/main/resources/chisel3/Makefile diff --git a/src/main/resources/top.cpp b/src/main/resources/chisel3/top.cpp index 4e9c1433..4e9c1433 100644 --- a/src/main/resources/top.cpp +++ b/src/main/resources/chisel3/top.cpp diff --git a/src/main/scala/chisel3/testers/TesterDriver.scala b/src/main/scala/chisel3/testers/TesterDriver.scala index fd3ad9ba..fc71f2b0 100644 --- a/src/main/scala/chisel3/testers/TesterDriver.scala +++ b/src/main/scala/chisel3/testers/TesterDriver.scala @@ -28,7 +28,7 @@ object TesterDriver extends BackendCompilationUtilities { // Copy CPP harness and other Verilog sources from resources into files val cppHarness = new File(path, "top.cpp") - copyResourceToFile("/top.cpp", cppHarness) + copyResourceToFile("/chisel3/top.cpp", cppHarness) val additionalVFiles = additionalVResources.map((name: String) => { val mangledResourceName = name.replace("/", "_") val out = new File(path, mangledResourceName) |