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-rw-r--r--src/main/scala/chisel3/compatibility.scala2
-rw-r--r--src/main/scala/chisel3/testers/BasicTester.scala2
-rw-r--r--src/main/scala/chisel3/util/Bitwise.scala4
-rw-r--r--src/main/scala/chisel3/util/ImplicitConversions.scala2
-rw-r--r--src/main/scala/chisel3/util/OneHot.scala2
5 files changed, 6 insertions, 6 deletions
diff --git a/src/main/scala/chisel3/compatibility.scala b/src/main/scala/chisel3/compatibility.scala
index 1d0c0ff7..969a31eb 100644
--- a/src/main/scala/chisel3/compatibility.scala
+++ b/src/main/scala/chisel3/compatibility.scala
@@ -250,7 +250,7 @@ package object Chisel { // scalastyle:ignore package.object.name
val Mux = chisel3.core.Mux
type Reset = chisel3.core.Reset
- implicit def resetToBool(reset: Reset): Bool = reset.toBool
+ implicit def resetToBool(reset: Reset): Bool = reset.asBool
import chisel3.core.Param
abstract class BlackBox(params: Map[String, Param] = Map.empty[String, Param]) extends chisel3.core.BlackBox(params) {
diff --git a/src/main/scala/chisel3/testers/BasicTester.scala b/src/main/scala/chisel3/testers/BasicTester.scala
index 1f988a3b..c21a2cdd 100644
--- a/src/main/scala/chisel3/testers/BasicTester.scala
+++ b/src/main/scala/chisel3/testers/BasicTester.scala
@@ -25,7 +25,7 @@ class BasicTester extends Module() {
*/
def stop()(implicit sourceInfo: SourceInfo) {
// TODO: rewrite this using library-style SourceInfo passing.
- when (!reset.toBool) {
+ when (!reset.asBool) {
pushCommand(Stop(sourceInfo, clock.ref, 0))
}
}
diff --git a/src/main/scala/chisel3/util/Bitwise.scala b/src/main/scala/chisel3/util/Bitwise.scala
index 387fd109..956b8262 100644
--- a/src/main/scala/chisel3/util/Bitwise.scala
+++ b/src/main/scala/chisel3/util/Bitwise.scala
@@ -24,7 +24,7 @@ object FillInterleaved {
*
* Output data-equivalent to in(size(in)-1) (n times) ## ... ## in(1) (n times) ## in(0) (n times)
*/
- def apply(n: Int, in: UInt): UInt = apply(n, in.toBools)
+ def apply(n: Int, in: UInt): UInt = apply(n, in.asBools)
/** Creates n repetitions of each bit of x in order.
*
@@ -69,7 +69,7 @@ object Fill {
case 0 => UInt(0.W)
case 1 => x
case _ if x.isWidthKnown && x.getWidth == 1 =>
- Mux(x.toBool, ((BigInt(1) << n) - 1).asUInt(n.W), 0.U(n.W))
+ Mux(x.asBool, ((BigInt(1) << n) - 1).asUInt(n.W), 0.U(n.W))
case _ =>
val nBits = log2Ceil(n + 1)
val p2 = Array.ofDim[UInt](nBits)
diff --git a/src/main/scala/chisel3/util/ImplicitConversions.scala b/src/main/scala/chisel3/util/ImplicitConversions.scala
index 994ac735..24ea0470 100644
--- a/src/main/scala/chisel3/util/ImplicitConversions.scala
+++ b/src/main/scala/chisel3/util/ImplicitConversions.scala
@@ -13,5 +13,5 @@ object ImplicitConversions {
// The explicit fromIntToLiteral resolves an ambiguous conversion between fromIntToLiteral and
// UInt.asUInt.
implicit def intToUInt(x: Int): UInt = chisel3.core.fromIntToLiteral(x).asUInt
- implicit def booleanToBool(x: Boolean): Bool = x.asBool
+ implicit def booleanToBool(x: Boolean): Bool = x.B
}
diff --git a/src/main/scala/chisel3/util/OneHot.scala b/src/main/scala/chisel3/util/OneHot.scala
index a6af0d99..3ffbdfe2 100644
--- a/src/main/scala/chisel3/util/OneHot.scala
+++ b/src/main/scala/chisel3/util/OneHot.scala
@@ -36,7 +36,7 @@ object OHToUInt {
*/
object PriorityEncoder {
def apply(in: Seq[Bool]): UInt = PriorityMux(in, (0 until in.size).map(_.asUInt))
- def apply(in: Bits): UInt = apply(in.toBools)
+ def apply(in: Bits): UInt = apply(in.asBools)
}
/** Returns the one hot encoding of the input UInt.