diff options
Diffstat (limited to 'src/main/scala/chisel3/util/experimental/ForceNames.scala')
| -rw-r--r-- | src/main/scala/chisel3/util/experimental/ForceNames.scala | 62 |
1 files changed, 33 insertions, 29 deletions
diff --git a/src/main/scala/chisel3/util/experimental/ForceNames.scala b/src/main/scala/chisel3/util/experimental/ForceNames.scala index bac69ed4..53ee2bd2 100644 --- a/src/main/scala/chisel3/util/experimental/ForceNames.scala +++ b/src/main/scala/chisel3/util/experimental/ForceNames.scala @@ -2,7 +2,7 @@ package chisel3.util.experimental -import chisel3.experimental.{ChiselAnnotation, RunFirrtlTransform, annotate} +import chisel3.experimental.{annotate, ChiselAnnotation, RunFirrtlTransform} import firrtl.Mappers._ import firrtl._ import firrtl.annotations._ @@ -49,7 +49,7 @@ object forceName { * @param instance Instance to name */ def apply(instance: chisel3.experimental.BaseModule, name: String): Unit = { - annotate(new ChiselAnnotation with RunFirrtlTransform { + annotate(new ChiselAnnotation with RunFirrtlTransform { def toFirrtl = { val t = instance.toAbsoluteTarget ForceNameAnnotation(t, name) @@ -64,7 +64,7 @@ object forceName { * @param instance Signal to name */ def apply(instance: chisel3.experimental.BaseModule): Unit = { - annotate(new ChiselAnnotation with RunFirrtlTransform { + annotate(new ChiselAnnotation with RunFirrtlTransform { def toFirrtl = { val t = instance.toAbsoluteTarget ForceNameAnnotation(t, instance.instanceName) @@ -80,8 +80,7 @@ object forceName { * @param target signal/instance to force the name * @param name name to force it to be */ -case class ForceNameAnnotation(target: IsMember, name: String) - extends SingleTargetAnnotation[IsMember] { +case class ForceNameAnnotation(target: IsMember, name: String) extends SingleTargetAnnotation[IsMember] { def duplicate(n: IsMember): ForceNameAnnotation = this.copy(target = n, name) // Errors if renaming to multiple targets @@ -105,6 +104,7 @@ case class ForceNameAnnotation(target: IsMember, name: String) * Could (should?) be moved to FIRRTL. */ private object ForceNamesTransform { + /** Returns the [[IsModule]] which is referred to, or if a [[ReferenceTarget]], the enclosing [[IsModule]] * * @param a signal/instance/module @@ -123,10 +123,12 @@ private object ForceNamesTransform { */ def allInstancePaths(graph: InstanceKeyGraph): IsModule => List[List[(Instance, OfModule)]] = { val lookup: String => List[List[(Instance, OfModule)]] = - str => graph.findInstancesInHierarchy(str) - .view - .map(_.map(_.toTokens).toList) - .toList + str => + graph + .findInstancesInHierarchy(str) + .view + .map(_.map(_.toTokens).toList) + .toList allInstancePaths(lookup) _ } @@ -136,8 +138,10 @@ private object ForceNamesTransform { * @param target target to get all instance paths to * @return */ - def allInstancePaths(lookup: String => List[List[(Instance, OfModule)]]) - (target: IsModule): List[List[(Instance, OfModule)]] = { + def allInstancePaths( + lookup: String => List[List[(Instance, OfModule)]] + )(target: IsModule + ): List[List[(Instance, OfModule)]] = { target match { case ModuleTarget(circuit, module) => if (circuit == module) List(List((Instance(module), OfModule(module)))) @@ -149,16 +153,13 @@ private object ForceNamesTransform { } } - /** Builds the map of module name to map of old signal/instance name to new signal/instance name * * @param state CircuitState to operate on * @param igraph built instance key graph from state's circuit * @return */ - def buildForceNameMap(state: CircuitState, - igraph: => InstanceKeyGraph - ): Option[Map[String, Map[String, String]]] = { + def buildForceNameMap(state: CircuitState, igraph: => InstanceKeyGraph): Option[Map[String, Map[String, String]]] = { val forceNames = state.annotations.collect { case f: ForceNameAnnotation => f } val badNames = mutable.HashSet[ForceNameAnnotation]() val allNameMaps = forceNames.groupBy { case f => referringIsModule(f.target) }.mapValues { value => @@ -207,9 +208,9 @@ private object ForceNamesTransform { * - Use to avoid prefixing behavior on specific instances whose enclosing modules are inlined */ class ForceNamesTransform extends Transform with DependencyAPIMigration { - override def optionalPrerequisites: Seq[TransformDependency] = Seq(Dependency[InlineInstances]) + override def optionalPrerequisites: Seq[TransformDependency] = Seq(Dependency[InlineInstances]) override def optionalPrerequisiteOf: Seq[TransformDependency] = Forms.LowEmitters - override def prerequisites: Seq[TransformDependency] = Seq(Dependency(LowerTypes)) + override def prerequisites: Seq[TransformDependency] = Seq(Dependency(LowerTypes)) override def invalidates(a: Transform): Boolean = firrtl.passes.InferTypes == a import ForceNamesTransform._ @@ -226,22 +227,23 @@ class ForceNamesTransform extends Transform with DependencyAPIMigration { */ private def forceNamesInModule( modToNames: Map[String, Map[String, String]], - renameMap: RenameMap, - ct: CircuitTarget, - igraph: InstanceKeyGraph - )(mod: DefModule): DefModule = { + renameMap: RenameMap, + ct: CircuitTarget, + igraph: InstanceKeyGraph + )(mod: DefModule + ): DefModule = { val mt = ct.module(mod.name) val instToOfModule = mutable.HashMap[String, String]() val names = modToNames.getOrElse(mod.name, Map.empty[String, String]) // Need to find WRef referring to mems for prefixing def onExpr(expr: Expression): Expression = expr match { - case ref @ Reference(n, _,_,_) if names.contains(n) => + case ref @ Reference(n, _, _, _) if names.contains(n) => ref.copy(name = names(n)) - case sub @ SubField(WRef(i, _, _, _), p,_,_) if instToOfModule.contains(i) => + case sub @ SubField(WRef(i, _, _, _), p, _, _) if instToOfModule.contains(i) => val newsub = modToNames.get(instToOfModule(i)) match { case Some(map) if map.contains(p) => sub.copy(name = map(p)) - case _ => sub + case _ => sub } newsub.map(onExpr) case other => other.map(onExpr) @@ -269,17 +271,19 @@ class ForceNamesTransform extends Transform with DependencyAPIMigration { } else port } - val childInstanceHasRename = igraph.getChildInstanceMap(OfModule(mod.name)).exists { - o => modToNames.contains(o._2.value) + val childInstanceHasRename = igraph.getChildInstanceMap(OfModule(mod.name)).exists { o => + modToNames.contains(o._2.value) } - if(childInstanceHasRename || modToNames.contains(mod.name)) { + if (childInstanceHasRename || modToNames.contains(mod.name)) { val ns = Namespace(mod) val conflicts = names.values.collect { case k if ns.contains(k) => k } - if(conflicts.isEmpty) { + if (conflicts.isEmpty) { mod.map(onPort).map(onStmt) } else { - throw new FirrtlUserException(s"Cannot force the following names in module ${mod.name} because they conflict: ${conflicts.mkString(",")}") + throw new FirrtlUserException( + s"Cannot force the following names in module ${mod.name} because they conflict: ${conflicts.mkString(",")}" + ) } } else mod } |
