diff options
Diffstat (limited to 'src/main/scala/chisel3/util/CircuitMath.scala')
| -rw-r--r-- | src/main/scala/chisel3/util/CircuitMath.scala | 21 |
1 files changed, 13 insertions, 8 deletions
diff --git a/src/main/scala/chisel3/util/CircuitMath.scala b/src/main/scala/chisel3/util/CircuitMath.scala index d478e10e..b5f491ef 100644 --- a/src/main/scala/chisel3/util/CircuitMath.scala +++ b/src/main/scala/chisel3/util/CircuitMath.scala @@ -7,18 +7,27 @@ package chisel3.util import chisel3._ +/** Returns the base-2 integer logarithm of an UInt. + * + * @note The result is truncated, so e.g. Log2(13.U) === 3.U + * + * @example {{{ + * Log2(8.U) // evaluates to 3.U + * Log2(13.U) // evaluates to 3.U (truncation) + * Log2(myUIntWire) + * }}} + * + */ object Log2 { /** Returns the base-2 integer logarithm of the least-significant `width` bits of an UInt. - * - * @note The result is truncated, so e.g. Log2(UInt(13)) === UInt(3) */ def apply(x: Bits, width: Int): UInt = { if (width < 2) { - UInt(0) + 0.U } else if (width == 2) { x(1) } else if (width <= divideAndConquerThreshold) { - Mux(x(width-1), UInt(width-1), apply(x, width-1)) + Mux(x(width-1), (width-1).asUInt, apply(x, width-1)) } else { val mid = 1 << (log2Ceil(width) - 1) val hi = x(width-1, mid) @@ -28,10 +37,6 @@ object Log2 { } } - /** Returns the base-2 integer logarithm of an UInt. - * - * @note The result is truncated, so e.g. Log2(UInt(13)) === UInt(3) - */ def apply(x: Bits): UInt = apply(x, x.getWidth) private def divideAndConquerThreshold = 4 |
