diff options
Diffstat (limited to 'src/main/scala/chisel3/testers')
| -rw-r--r-- | src/main/scala/chisel3/testers/BasicTester.scala | 3 | ||||
| -rw-r--r-- | src/main/scala/chisel3/testers/TesterDriver.scala | 1 |
2 files changed, 3 insertions, 1 deletions
diff --git a/src/main/scala/chisel3/testers/BasicTester.scala b/src/main/scala/chisel3/testers/BasicTester.scala index 5e28a523..42ae89eb 100644 --- a/src/main/scala/chisel3/testers/BasicTester.scala +++ b/src/main/scala/chisel3/testers/BasicTester.scala @@ -5,6 +5,7 @@ import chisel3._ import scala.language.experimental.macros +import firrtl.{annoSeqToSeq, seqToAnnoSeq} import chisel3.internal.Builder.pushCommand import chisel3.internal.firrtl._ import chisel3.internal.sourceinfo.SourceInfo @@ -21,7 +22,7 @@ class BasicTester extends Module() { * reset). If your definition of reset is not the encapsulating Module's * reset, you will need to gate this externally. */ - def stop()(implicit sourceInfo: SourceInfo): Unit = chisel3.stop() + // def stop()(implicit sourceInfo: SourceInfo): Unit = chisel3.stop() /** The finish method provides a hook that subclasses of BasicTester can use to * alter a circuit after their constructor has been called. diff --git a/src/main/scala/chisel3/testers/TesterDriver.scala b/src/main/scala/chisel3/testers/TesterDriver.scala index 9c4b2da9..28ce7445 100644 --- a/src/main/scala/chisel3/testers/TesterDriver.scala +++ b/src/main/scala/chisel3/testers/TesterDriver.scala @@ -12,6 +12,7 @@ import firrtl.annotations.NoTargetAnnotation import firrtl.options.{Dependency, Phase, PhaseManager, TargetDirAnnotation, Unserializable} import firrtl.stage.{FirrtlCircuitAnnotation, FirrtlStage} import firrtl.transforms.BlackBoxSourceHelper.writeResourceToDirectory +import firrtl.{annoSeqToSeq, seqToAnnoSeq} object TesterDriver extends BackendCompilationUtilities { |