summaryrefslogtreecommitdiff
path: root/docs-target/src
diff options
context:
space:
mode:
Diffstat (limited to 'docs-target/src')
-rw-r--r--docs-target/src/main/resources/META-INF/services/mdoc.PostModifier1
-rw-r--r--docs-target/src/main/scala/chisel3/docs/VerilogMdocModifier.scala34
2 files changed, 35 insertions, 0 deletions
diff --git a/docs-target/src/main/resources/META-INF/services/mdoc.PostModifier b/docs-target/src/main/resources/META-INF/services/mdoc.PostModifier
new file mode 100644
index 00000000..9c0bd9bb
--- /dev/null
+++ b/docs-target/src/main/resources/META-INF/services/mdoc.PostModifier
@@ -0,0 +1 @@
+chisel3.docs.VerilogMdocModifier
diff --git a/docs-target/src/main/scala/chisel3/docs/VerilogMdocModifier.scala b/docs-target/src/main/scala/chisel3/docs/VerilogMdocModifier.scala
new file mode 100644
index 00000000..a76e412a
--- /dev/null
+++ b/docs-target/src/main/scala/chisel3/docs/VerilogMdocModifier.scala
@@ -0,0 +1,34 @@
+package chisel3.docs
+
+import java.nio.file.Files
+import java.nio.file.Paths
+import mdoc._
+import scala.meta.inputs.Position
+
+/** Custom modifier for rendering Chisel-generated Verilog
+ *
+ * See chisel3/docs/README.md for use
+ */
+class VerilogMdocModifier extends PostModifier {
+ val name = "verilog"
+ def process(ctx: PostModifierContext): String = {
+ val result =
+ ctx.variables.foldLeft(Option("")) {
+ case (Some(acc), variable) if variable.staticType == "String" =>
+ Some(acc + variable.runtimeValue)
+ case (Some(_), badVar) =>
+ ctx.reporter.error(
+ badVar.pos,
+ s"""type mismatch:
+ |expected: String
+ |received: ${badVar.runtimeValue}""".stripMargin
+ )
+ None
+ case (None, _) => None
+ }
+ result match {
+ case Some(content) => s"```verilog\n$content```"
+ case None => ""
+ }
+ }
+}