diff options
Diffstat (limited to 'core/src/main/scala/chisel3/internal')
| -rw-r--r-- | core/src/main/scala/chisel3/internal/firrtl/IR.scala | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/core/src/main/scala/chisel3/internal/firrtl/IR.scala b/core/src/main/scala/chisel3/internal/firrtl/IR.scala index 1d77802b..a4f6d26d 100644 --- a/core/src/main/scala/chisel3/internal/firrtl/IR.scala +++ b/core/src/main/scala/chisel3/internal/firrtl/IR.scala @@ -161,15 +161,21 @@ case class IntervalLit(n: BigInt, w: Width, binaryPoint: BinaryPoint) extends Li } case class Ref(name: String) extends Arg +/** Arg for ports of Modules + * @param mod the module this port belongs to + * @param name the name of the port + */ case class ModuleIO(mod: BaseModule, name: String) extends Arg { override def fullName(ctx: Component): String = if (mod eq ctx.id) name else s"${mod.getRef.name}.$name" } -// For use with CloneModuleAsRecord -// Note that `name` is the name of the module instance whereas in ModuleIO it's the name of the port -// The names of ports inside of a ModuleCloneIO are the names of the Slots +/** Ports of cloned modules (CloneModuleAsRecord) + * @param mod The original module for which these ports are a clone + * @param name the name of the module instance + */ case class ModuleCloneIO(mod: BaseModule, name: String) extends Arg { override def fullName(ctx: Component): String = + // NOTE: mod eq ctx.id only occurs in Target and Named-related APIs if (mod eq ctx.id) "" else name } case class Slot(imm: Node, name: String) extends Arg { |