summaryrefslogtreecommitdiff
path: root/core/src/main/scala/chisel3/Data.scala
diff options
context:
space:
mode:
Diffstat (limited to 'core/src/main/scala/chisel3/Data.scala')
-rw-r--r--core/src/main/scala/chisel3/Data.scala6
1 files changed, 6 insertions, 0 deletions
diff --git a/core/src/main/scala/chisel3/Data.scala b/core/src/main/scala/chisel3/Data.scala
index 377a94e6..0241f248 100644
--- a/core/src/main/scala/chisel3/Data.scala
+++ b/core/src/main/scala/chisel3/Data.scala
@@ -392,6 +392,7 @@ abstract class Data extends HasId with NamedComponent with SourceInfoDoc {
case Some(DontCareBinding()) => s"(DontCare)"
case Some(ElementLitBinding(litArg)) => s"(unhandled literal)"
case Some(BundleLitBinding(litMap)) => s"(unhandled bundle literal)"
+ case Some(VecLitBinding(litMap)) => s"(unhandled vec literal)"
}).getOrElse("")
// Return ALL elements at root of this type.
@@ -491,6 +492,11 @@ abstract class Data extends HasId with NamedComponent with SourceInfoDoc {
case Some(litArg) => litArg
case _ => materializeWire() // FIXME FIRRTL doesn't have Bundle literal expressions
}
+ case Some(VecLitBinding(litMap)) =>
+ litMap.get(this) match {
+ case Some(litArg) => litArg
+ case _ => materializeWire() // FIXME FIRRTL doesn't have Vec literal expressions
+ }
case Some(DontCareBinding()) =>
materializeWire() // FIXME FIRRTL doesn't have a DontCare expression so materialize a Wire
// Non-literals