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-rw-r--r--chiselFrontend/src/main/scala/chisel3/core/Bits.scala10
1 files changed, 9 insertions, 1 deletions
diff --git a/chiselFrontend/src/main/scala/chisel3/core/Bits.scala b/chiselFrontend/src/main/scala/chisel3/core/Bits.scala
index 83733089..82b60a4c 100644
--- a/chiselFrontend/src/main/scala/chisel3/core/Bits.scala
+++ b/chiselFrontend/src/main/scala/chisel3/core/Bits.scala
@@ -563,10 +563,14 @@ private[core] sealed trait UIntFactory {
result.binding = LitBinding()
result
}
- /** Create a UInt with the specified range */
+ /** Create a UInt with the specified range */
def apply(range: Range): UInt = {
width(range.getWidth)
}
+ /** Create a UInt with the specified range */
+ def apply(range: (NumericBound[Int], NumericBound[Int])): UInt = {
+ apply(KnownUIntRange(range._1, range._2))
+ }
/** Create a UInt with a specified width - compatibility with Chisel2. */
// NOTE: This resolves UInt(width = 32)
@@ -736,6 +740,10 @@ object SInt {
def apply(range: Range): SInt = {
width(range.getWidth)
}
+ /** Create a SInt with the specified range */
+ def apply(range: (NumericBound[Int], NumericBound[Int])): SInt = {
+ apply(KnownSIntRange(range._1, range._2))
+ }
def Lit(value: BigInt): SInt = Lit(value, Width())
def Lit(value: BigInt, width: Int): SInt = Lit(value, Width(width))