1 files changed, 5 insertions, 3 deletions
diff --git a/chiselFrontend/src/main/scala/chisel3/core/Module.scala b/chiselFrontend/src/main/scala/chisel3/core/Module.scala
index 0f081daf..558e6432 100644
--- a/chiselFrontend/src/main/scala/chisel3/core/Module.scala
+++ b/chiselFrontend/src/main/scala/chisel3/core/Module.scala
@@ -235,9 +235,11 @@ abstract class BaseModule extends HasId {
         case data: Aggregate => data.userDirection match {
           // Recurse into children to ensure explicit direction set somewhere
           case UserDirection.Unspecified | UserDirection.Flip => data match {
-            case data: Record if (!data.compileOptions.dontAssumeDirectionality) =>
-              data.getElements.foreach(assignCompatDir(_, true))
-            case _ => data.getElements.foreach(assignCompatDir(_, false))
+            case record: Record =>
+              val compatRecord = !record.compileOptions.dontAssumeDirectionality
+              record.getElements.foreach(assignCompatDir(_, compatRecord))
+            case vec: Vec[_] =>
+              vec.getElements.foreach(assignCompatDir(_, insideCompat))
           }
           case UserDirection.Input | UserDirection.Output => // forced assign, nothing to do
         }