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-rw-r--r--chiselFrontend/src/main/scala/chisel3/core/Data.scala6
1 files changed, 6 insertions, 0 deletions
diff --git a/chiselFrontend/src/main/scala/chisel3/core/Data.scala b/chiselFrontend/src/main/scala/chisel3/core/Data.scala
index 5ae8c84d..573632ab 100644
--- a/chiselFrontend/src/main/scala/chisel3/core/Data.scala
+++ b/chiselFrontend/src/main/scala/chisel3/core/Data.scala
@@ -132,6 +132,9 @@ abstract class Data(dirArg: Direction) extends HasId {
def do_asUInt(implicit sourceInfo: SourceInfo): UInt =
SeqUtils.do_asUInt(this.flatten)(sourceInfo)
+
+ /** Default pretty printing */
+ def toPrintable: Printable
}
object Wire {
@@ -171,4 +174,7 @@ sealed class Clock(dirArg: Direction) extends Element(dirArg, Width(1)) {
case _: Clock => this connect that
case _ => this badConnect that
}
+
+ /** Not really supported */
+ def toPrintable: Printable = PString("CLOCK")
}