1 files changed, 9 insertions, 3 deletions
diff --git a/chiselFrontend/src/main/scala/chisel3/core/CompileOptions.scala b/chiselFrontend/src/main/scala/chisel3/core/CompileOptions.scala
index 55e6d18c..e22519d9 100644
--- a/chiselFrontend/src/main/scala/chisel3/core/CompileOptions.scala
+++ b/chiselFrontend/src/main/scala/chisel3/core/CompileOptions.scala
@@ -18,6 +18,8 @@ trait CompileOptions {
   val dontAssumeDirectionality: Boolean
   // Check that referenced Data have actually been declared.
   val checkSynthesizable: Boolean
+  // Require explicit assignment of DontCare to generate "x is invalid"
+  val explicitInvalidate: Boolean
 }
 
 object CompileOptions {
@@ -44,7 +46,9 @@ object ExplicitCompileOptions {
                              // If connection directionality is not explicit, do not use heuristics to attempt to determine it.
                              val dontAssumeDirectionality: Boolean,
                              // Check that referenced Data have actually been declared.
-                             val checkSynthesizable: Boolean
+                             val checkSynthesizable: Boolean,
+                             // Require an explicit DontCare assignment to generate a firrtl DefInvalid
+                             val explicitInvalidate: Boolean
                            ) extends CompileOptions
 
   // Collection of "not strict" connection compile options.
@@ -55,7 +59,8 @@ object ExplicitCompileOptions {
     declaredTypeMustBeUnbound = false,
     dontTryConnectionsSwapped = false,
     dontAssumeDirectionality = false,
-    checkSynthesizable = false
+    checkSynthesizable = false,
+    explicitInvalidate = false
   )
 
   // Collection of "strict" connection compile options, preferred for new code.
@@ -65,6 +70,7 @@ object ExplicitCompileOptions {
     declaredTypeMustBeUnbound = true,
     dontTryConnectionsSwapped = true,
     dontAssumeDirectionality = true,
-    checkSynthesizable = true
+    checkSynthesizable = true,
+    explicitInvalidate = true
   )
 }