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-rw-r--r--chiselFrontend/src/main/scala/chisel3/core/ChiselAnnotation.scala4
1 files changed, 3 insertions, 1 deletions
diff --git a/chiselFrontend/src/main/scala/chisel3/core/ChiselAnnotation.scala b/chiselFrontend/src/main/scala/chisel3/core/ChiselAnnotation.scala
index ad4050f3..07546406 100644
--- a/chiselFrontend/src/main/scala/chisel3/core/ChiselAnnotation.scala
+++ b/chiselFrontend/src/main/scala/chisel3/core/ChiselAnnotation.scala
@@ -2,6 +2,8 @@
package chisel3.core
+import scala.language.existentials
+
import chisel3.internal.{Builder, InstanceId}
import firrtl.Transform
import firrtl.annotations.{Annotation, CircuitName, ComponentName, ModuleName}
@@ -56,7 +58,7 @@ object dontTouch { // scalastyle:ignore object.name
*/
def apply[T <: Data](data: T)(implicit compileOptions: CompileOptions): T = {
if (compileOptions.checkSynthesizable) {
- Binding.checkSynthesizable(data, s"$data")
+ requireIsHardware(data, "Data marked dontTouch")
}
// TODO unify with firrtl.transforms.DontTouchAnnotation
val anno = ChiselAnnotation(data, classOf[firrtl.Transform], "DONTtouch!")