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-rw-r--r--chiselFrontend/src/main/scala/chisel3/core/Aggregate.scala22
-rw-r--r--src/main/scala/chisel3/package.scala1
-rw-r--r--src/test/scala/chiselTests/BundleSpec.scala5
3 files changed, 21 insertions, 7 deletions
diff --git a/chiselFrontend/src/main/scala/chisel3/core/Aggregate.scala b/chiselFrontend/src/main/scala/chisel3/core/Aggregate.scala
index cfb9810c..4ffbb893 100644
--- a/chiselFrontend/src/main/scala/chisel3/core/Aggregate.scala
+++ b/chiselFrontend/src/main/scala/chisel3/core/Aggregate.scala
@@ -479,6 +479,21 @@ abstract class Record(private[chisel3] implicit val compileOptions: CompileOptio
def toPrintable: Printable = toPrintableHelper(elements.toList)
}
+/**
+ * Mix-in for Bundles that have arbitrary Seqs of Chisel types that aren't
+ * involved in hardware construction.
+ *
+ * Used to avoid raising an error/exception when a Seq is a public member of the
+ * bundle.
+ * This is useful if we those public Seq fields in the Bundle are unrelated to
+ * hardware construction.
+ */
+trait IgnoreSeqInBundle {
+ this: Bundle =>
+
+ override def ignoreSeq: Boolean = true
+}
+
class AutoClonetypeException(message: String) extends ChiselException(message, null)
/** Base class for data types defined as a bundle of other data types.
@@ -555,8 +570,8 @@ abstract class Bundle(implicit compileOptions: CompileOptions) extends Record {
case d: Data => throwException("Public Seq members cannot be used to define Bundle elements " +
s"(found public Seq member '${m.getName}'). " +
"Either use a Vec() if all elements are of the same type, or HeterogeneousVec() if the elements " +
- "are of different types. If this Seq member is not intended to construct RTL, override ignoreSeq " +
- "to be true.")
+ "are of different types. If this Seq member is not intended to construct RTL, mix in the trait " +
+ "IgnoreSeqInBundle.")
case _ => // don't care about non-Data Seq
}
case _ => // not a Seq
@@ -568,8 +583,7 @@ abstract class Bundle(implicit compileOptions: CompileOptions) extends Record {
}
/**
- * Override this to be true to avoid raising an error/exception when a Seq is a public member of the bundle.
- * This is useful if you have public Seq fields in the Bundle that are unrelated to hardware construction.
+ * Overridden by [[IgnoreSeqInBundle]] to allow arbitrary Seqs of Chisel elements.
*/
def ignoreSeq: Boolean = false
diff --git a/src/main/scala/chisel3/package.scala b/src/main/scala/chisel3/package.scala
index 81056483..f0542d7e 100644
--- a/src/main/scala/chisel3/package.scala
+++ b/src/main/scala/chisel3/package.scala
@@ -119,6 +119,7 @@ package object chisel3 { // scalastyle:ignore package.object.name
type Vec[T <: Data] = chisel3.core.Vec[T]
type VecLike[T <: Data] = chisel3.core.VecLike[T]
type Bundle = chisel3.core.Bundle
+ type IgnoreSeqInBundle = chisel3.core.IgnoreSeqInBundle
type Record = chisel3.core.Record
val assert = chisel3.core.assert
diff --git a/src/test/scala/chiselTests/BundleSpec.scala b/src/test/scala/chiselTests/BundleSpec.scala
index b248f7b5..502134b4 100644
--- a/src/test/scala/chiselTests/BundleSpec.scala
+++ b/src/test/scala/chiselTests/BundleSpec.scala
@@ -3,6 +3,7 @@
package chiselTests
import chisel3._
+import chisel3.core.IgnoreSeqInBundle
import chisel3.testers.BasicTester
trait BundleSpecUtils {
@@ -91,9 +92,7 @@ class BundleSpec extends ChiselFlatSpec with BundleSpecUtils {
new BasicTester {
val m = Module(new Module {
val io = IO(new Bundle {
- val b = new BadSeqBundle {
- override def ignoreSeq = true
- }
+ val b = new BadSeqBundle with IgnoreSeqInBundle
})
})
stop()