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| -rw-r--r-- | README.md | 5 |
1 files changed, 3 insertions, 2 deletions
@@ -105,6 +105,9 @@ brew install sbt verilator If you are migrating to Chisel3 from Chisel2, please visit [Chisel3 vs Chisel2](https://github.com/ucb-bar/chisel3/wiki/Chisel3-vs-Chisel2) +### Resources for Learning Chisel +* [Chisel Bootcamp](https://github.com/freechipsproject/chisel-bootcamp), a collection of interactive Jupyter notebooks that teach Chisel +* [Chisel Tutorial](https://github.com/ucb-bar/chisel-tutorial), a collection of exercises utlizing `sbt` ### Data Types Overview These are the base data types for defining circuit wires (abstract types which @@ -112,8 +115,6 @@ may not be instantiated are greyed out):  -### [Chisel Tutorial](https://github.com/ucb-bar/chisel-tutorial) - ## For Hardware Engineers This section describes how to get started using Chisel to create a new RTL design from scratch. |