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| -rw-r--r-- | docs/src/appendix/experimental-features.md | 2 |
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diff --git a/docs/src/appendix/experimental-features.md b/docs/src/appendix/experimental-features.md index 4b1208aa..92226f8f 100644 --- a/docs/src/appendix/experimental-features.md +++ b/docs/src/appendix/experimental-features.md @@ -3,6 +3,7 @@ layout: docs title: "Experimental Features" section: "chisel3" --- +# Experimental Features Chisel has a number of new features that are worth checking out. This page is an informal list of these features and projects. @@ -12,6 +13,7 @@ Chisel has a number of new features that are worth checking out. This page is a - [Interval Type](#interval-type) - [Loading Memories for simulation or FPGA initialization](#loading-memories) + ### FixedPoint <a name="fixed-point"></a> FixedPoint numbers are basic *Data* type along side of UInt, SInt, etc. Most common math and logic operations are supported. Chisel allows both the width and binary point to be inferred by the Firrtl compiler which can simplify |