diff options
| -rw-r--r-- | chiselFrontend/src/main/scala/chisel3/core/Bits.scala | 2 | ||||
| -rw-r--r-- | src/test/scala/chiselTests/UIntOps.scala | 10 |
2 files changed, 11 insertions, 1 deletions
diff --git a/chiselFrontend/src/main/scala/chisel3/core/Bits.scala b/chiselFrontend/src/main/scala/chisel3/core/Bits.scala index 9356a91c..ffde7c87 100644 --- a/chiselFrontend/src/main/scala/chisel3/core/Bits.scala +++ b/chiselFrontend/src/main/scala/chisel3/core/Bits.scala @@ -364,7 +364,7 @@ sealed abstract class Bits(private[chisel3] val width: Width) extends Element wi final def toBools(): Seq[Bool] = macro SourceInfoTransform.noArg /** @group SourceInfoTransformMacro */ - def toBools(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Seq[Bool] = + def do_toBools(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Seq[Bool] = Seq.tabulate(this.getWidth)(i => this(i)) /** Reinterpret this $coll as a [[SInt]] diff --git a/src/test/scala/chiselTests/UIntOps.scala b/src/test/scala/chiselTests/UIntOps.scala index d583c0bb..4bd9706d 100644 --- a/src/test/scala/chiselTests/UIntOps.scala +++ b/src/test/scala/chiselTests/UIntOps.scala @@ -139,5 +139,15 @@ class UIntOpsSpec extends ChiselPropSpec with Matchers { property("Bit extraction on literals should work for all non-negative indices") { assertTesterPasses(new UIntLitExtractTester) } + + property("toBools should support chained apply") { + elaborate(new Module { + val io = IO(new Bundle { + val in = Input(UInt(8.W)) + val out = Output(Bool()) + }) + io.out := io.in.toBools()(2) + }) + } } |