4 files changed, 34 insertions, 30 deletions
diff --git a/core/src/main/scala/chisel3/Bits.scala b/core/src/main/scala/chisel3/Bits.scala
index c914e88c..72094a65 100644
--- a/core/src/main/scala/chisel3/Bits.scala
+++ b/core/src/main/scala/chisel3/Bits.scala
@@ -100,10 +100,10 @@ sealed abstract class Bits(private[chisel3] val width: Width) extends Element wi
     * @param x an index
     * @return the specified bit
     */
-  final def apply(x: BigInt): Bool = macro IntLiteralApplyTransform.safeApply
+  final def extract(x: BigInt): Bool = macro SourceInfoTransform.xArg
 
   /** @group SourceInfoTransformMacro */
-  final def do_apply(x: BigInt)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Bool = {
+  final def do_extract(x: BigInt)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Bool = {
     if (x < 0) {
       Builder.error(s"Negative bit indices are illegal (got $x)")
     }
@@ -128,25 +128,47 @@ sealed abstract class Bits(private[chisel3] val width: Width) extends Element wi
     * @param x an index
     * @return the specified bit
     */
+  final def apply(x: BigInt): Bool = macro IntLiteralApplyTransform.safeApply
+
+  /** @group SourceInfoTransformMacro */
+  final def do_apply(x: BigInt)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Bool =
+    do_extract(x)
+
+  /** Returns the specified bit on this $coll as a [[Bool]], statically addressed.
+    *
+    * @param x an index
+    * @return the specified bit
+    */
   final def apply(x: Int): Bool = macro IntLiteralApplyTransform.safeApply
 
   /** @group SourceInfoTransformMacro */
   final def do_apply(x: Int)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Bool =
-    do_apply(BigInt(x))
+    do_extract(BigInt(x))
 
   /** Returns the specified bit on this wire as a [[Bool]], dynamically addressed.
     *
     * @param x a hardware component whose value will be used for dynamic addressing
     * @return the specified bit
     */
-  final def apply(x: UInt): Bool = macro SourceInfoTransform.xArg
+  final def extract(x: UInt): Bool = macro SourceInfoTransform.xArg
 
   /** @group SourceInfoTransformMacro */
-  final def do_apply(x: UInt)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Bool = {
+  final def do_extract(x: UInt)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Bool = {
     val theBits = this >> x
     theBits(0)
   }
 
+  /** Returns the specified bit on this wire as a [[Bool]], dynamically addressed.
+    *
+    * @param x a hardware component whose value will be used for dynamic addressing
+    * @return the specified bit
+    */
+  final def apply(x: UInt): Bool = macro SourceInfoTransform.xArg
+
+  /** @group SourceInfoTransformMacro */
+  final def do_apply(x: UInt)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Bool =
+    do_extract(x)
+
   /** Returns a subset of bits on this $coll from `hi` to `lo` (inclusive), statically addressed.
     *
     * @example
diff --git a/macros/src/main/scala/chisel3/internal/sourceinfo/SourceInfoTransform.scala b/macros/src/main/scala/chisel3/internal/sourceinfo/SourceInfoTransform.scala
index 6c83da00..d77e4f1e 100644
--- a/macros/src/main/scala/chisel3/internal/sourceinfo/SourceInfoTransform.scala
+++ b/macros/src/main/scala/chisel3/internal/sourceinfo/SourceInfoTransform.scala
@@ -268,7 +268,7 @@ class IntLiteralApplyTransform(val c: Context) extends AutoSourceTransform {
           val msg =
             s"""Passing an Int to .$func is usually a mistake: It does *not* set the width but does a bit extract.
                |Did you mean .$func($arg.W)?
-               |If you want to hide this message, assign .$func to a val first, then invoke .apply($arg)
+               |If you do want bit extraction, use .extract($arg) instead
                |""".stripMargin
           c.warning(c.enclosingPosition, msg)
         }
diff --git a/src/test/scala/chiselTests/SIntOps.scala b/src/test/scala/chiselTests/SIntOps.scala
index 580a6e34..ebbd2012 100644
--- a/src/test/scala/chiselTests/SIntOps.scala
+++ b/src/test/scala/chiselTests/SIntOps.scala
@@ -85,18 +85,9 @@ class SIntOpsTester(c: SIntOps) extends Tester(c) {
  */
 
 class SIntLitExtractTester extends BasicTester {
-  assert({
-    val lit = -5.S
-    lit(1) === true.B
-  })
-  assert({
-    val lit = -5.S
-    lit(2) === false.B
-  })
-  assert({
-    val lit = -5.S
-    lit(100) === true.B
-  })
+  assert(-5.S.extract(1) === true.B)
+  assert(-5.S.extract(2) === false.B)
+  assert(-5.S.extract(100) === true.B)
   assert(-5.S(3, 0) === "b1011".U)
   assert(-5.S(9, 0) === "b1111111011".U)
   assert(-5.S(4.W)(1) === true.B)
diff --git a/src/test/scala/chiselTests/UIntOps.scala b/src/test/scala/chiselTests/UIntOps.scala
index 6569c9e7..2f55da9a 100644
--- a/src/test/scala/chiselTests/UIntOps.scala
+++ b/src/test/scala/chiselTests/UIntOps.scala
@@ -172,18 +172,9 @@ class MatchedRotateLeftAndRight(w: Int = 13) extends BasicTester {
 }
 
 class UIntLitExtractTester extends BasicTester {
-  assert({
-    val lit = "b101010".U
-    lit(2) === false.B
-  })
-  assert({
-    val lit = "b101010".U
-    lit(3) === true.B
-  })
-  assert({
-    val lit = "b101010".U
-    lit(100) === false.B
-  })
+  assert("b101010".U.extract(2) === false.B)
+  assert("b101010".U.extract(3) === true.B)
+  assert("b101010".U.extract(100) === false.B)
   assert("b101010".U(3, 0) === "b1010".U)
   assert("b101010".U(9, 0) === "b0000101010".U)