For Mux1H, use UInt instead of Bits

1 files changed, 2 insertions, 2 deletions

diff --git a/src/main/scala/Chisel/utils.scala b/src/main/scala/Chisel/utils.scala
index c2e88bd2..e3aff994 100644
--- a/src/main/scala/Chisel/utils.scala
+++ b/src/main/scala/Chisel/utils.scala
@@ -93,9 +93,9 @@ object Mux1H
       in.head._2.fromBits(masked.reduceLeft(_|_))
     }
   }
-  def apply[T <: Data](sel: Bits, in: Seq[T]): T =
+  def apply[T <: Data](sel: UInt, in: Seq[T]): T =
     apply((0 until in.size).map(sel(_)), in)
-  def apply(sel: Bits, in: Bits): Bool = (sel & in).orR
+  def apply(sel: UInt, in: UInt): Bool = (sel & in).orR
 }
 
 /** Builds a Mux tree under the assumption that multiple select signals