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authorJack Koenig2020-12-01 22:44:11 -0800
committerGitHub2020-12-01 22:44:11 -0800
commit5a6ce6604b5bde06dc88c55bc76aaf76aff87437 (patch)
treed05b075b94a521889129ec3f2e96a983d136faaa /src
parentba05dcaf10251f0c5e9eb0f8e30e101b83830c59 (diff)
Fix RegInit of Bundle lits (#1688)
Implemented by folding Element.ref into Data.ref. Element.ref had special handling for literals, but because Bundles can also be literals, there were code paths that tried to get the ref of a Bundle literal which was non-existent. Now, all literals are handled together. Because FIRRTL does not have support for Bundle literals, Bundle literal refs are implemented by materializing a Wire.
Diffstat (limited to 'src')
-rw-r--r--src/test/scala/chiselTests/BundleLiteralSpec.scala48
1 files changed, 48 insertions, 0 deletions
diff --git a/src/test/scala/chiselTests/BundleLiteralSpec.scala b/src/test/scala/chiselTests/BundleLiteralSpec.scala
index 12e62660..2a3ce2c9 100644
--- a/src/test/scala/chiselTests/BundleLiteralSpec.scala
+++ b/src/test/scala/chiselTests/BundleLiteralSpec.scala
@@ -169,6 +169,54 @@ class BundleLiteralSpec extends ChiselFlatSpec with Utils {
} }
}
+ "Bundle literals" should "work as register reset values" in {
+ assertTesterPasses{ new BasicTester{
+ val r = RegInit((new MyBundle).Lit(_.a -> 42.U, _.b -> true.B, _.c -> MyEnum.sB))
+ r := (r.asUInt + 1.U).asTypeOf(new MyBundle) // prevent constprop
+
+ // check reset values on first cycle out of reset
+ chisel3.assert(r.a === 42.U)
+ chisel3.assert(r.b === true.B)
+ chisel3.assert(r.c === MyEnum.sB)
+ stop()
+ } }
+ }
+
+ "partially initialized Bundle literals" should "work as register reset values" in {
+ assertTesterPasses{ new BasicTester{
+ val r = RegInit((new MyBundle).Lit(_.a -> 42.U))
+ r.a := r.a + 1.U // prevent const prop
+ chisel3.assert(r.a === 42.U) // coming out of reset
+ stop()
+ } }
+ }
+
+ "Fields extracted from BundleLiterals" should "work as register reset values" in {
+ assertTesterPasses{ new BasicTester{
+ val r = RegInit((new MyBundle).Lit(_.a -> 42.U).a)
+ r := r + 1.U // prevent const prop
+ chisel3.assert(r === 42.U) // coming out of reset
+ stop()
+ } }
+ }
+
+ "DontCare fields extracted from BundleLiterals" should "work as register reset values" in {
+ assertTesterPasses{ new BasicTester{
+ val r = RegInit((new MyBundle).Lit(_.a -> 42.U).b)
+ r := reset.asBool
+ printf(p"r = $r\n") // Can't assert because reset value is DontCare
+ stop()
+ } }
+ }
+
+ "DontCare fields extracted from BundleLiterals" should "work in other Expressions" in {
+ assertTesterPasses{ new BasicTester{
+ val x = (new MyBundle).Lit(_.a -> 42.U).b || true.B
+ chisel3.assert(x === true.B)
+ stop()
+ } }
+ }
+
"bundle literals with bad field specifiers" should "fail" in {
val exc = intercept[BundleLiteralException] {
extractCause[BundleLiteralException] {