Issue errors on out-of-range extracts when width is known (#2428) (#2429)

* Issue errors on out-of-range extracts when width is known

Firrtl will catch this later on, but better to error early if possible.

* Test that errors are generated on OOB extracts when width is known

(cherry picked from commit 462def429aa87becb544533880a3075a806c53e4)

Co-authored-by: Andrew Waterman <andrew@sifive.com>

1 files changed, 18 insertions, 0 deletions

diff --git a/src/test/scala/chiselTests/UIntOps.scala b/src/test/scala/chiselTests/UIntOps.scala
index 5fb86001..0010e9ac 100644
--- a/src/test/scala/chiselTests/UIntOps.scala
+++ b/src/test/scala/chiselTests/UIntOps.scala
@@ -199,6 +199,24 @@ class UIntOpsSpec extends ChiselPropSpec with Matchers with Utils {
     a[Exception] should be thrownBy extractCause[Exception] { ChiselStage.elaborate(new BadBoolConversion) }
   }
 
+  property("Out-of-bounds extraction from known-width UInts") {
+    a[ChiselException] should be thrownBy extractCause[ChiselException] {
+      ChiselStage.elaborate(new RawModule {
+        val u = IO(Input(UInt(2.W)))
+        u(2, 1)
+      })
+    }
+  }
+
+  property("Out-of-bounds single-bit extraction from known-width UInts") {
+    a[ChiselException] should be thrownBy extractCause[ChiselException] {
+      ChiselStage.elaborate(new RawModule {
+        val u = IO(Input(UInt(2.W)))
+        u(2)
+      })
+    }
+  }
+
   property("UIntOps should elaborate") {
     ChiselStage.elaborate { new UIntOps }
   }