Massive rename of CompileOptions.

Massage CompileOption names in an attempt to preserve default (Strict) CompileOptions in the absence of explicit imports.
NOTE: Since the default is now strict, we may encounter errors when we generate connections for clients (i.e., in Vec.do_apply() when we wire up a sequence).
We should really thread the CompileOptions through the macro system so the client's implicits are used.

34 files changed, 35 insertions, 58 deletions

diff --git a/src/test/scala/chiselTests/AnnotatingExample.scala b/src/test/scala/chiselTests/AnnotatingExample.scala
index 85b4b039..c84edf86 100644
--- a/src/test/scala/chiselTests/AnnotatingExample.scala
+++ b/src/test/scala/chiselTests/AnnotatingExample.scala
@@ -6,7 +6,6 @@ import chisel3._
 import chisel3.core.Module
 import chisel3.internal.InstanceId
 import chisel3.testers.BasicTester
-import chisel3.NotStrict.CompileOptions
 import org.scalatest._
 
 import scala.util.DynamicVariable
diff --git a/src/test/scala/chiselTests/Assert.scala b/src/test/scala/chiselTests/Assert.scala
index 509dedbd..efc2e1e7 100644
--- a/src/test/scala/chiselTests/Assert.scala
+++ b/src/test/scala/chiselTests/Assert.scala
@@ -6,7 +6,6 @@ import org.scalatest._
 import chisel3._
 import chisel3.testers.BasicTester
 import chisel3.util._
-import chisel3.NotStrict.CompileOptions
 
 class FailingAssertTester() extends BasicTester {
   assert(Bool(false))
diff --git a/src/test/scala/chiselTests/BetterNamingTests.scala b/src/test/scala/chiselTests/BetterNamingTests.scala
index 98ca0306..f5872adb 100644
--- a/src/test/scala/chiselTests/BetterNamingTests.scala
+++ b/src/test/scala/chiselTests/BetterNamingTests.scala
@@ -5,8 +5,6 @@ import collection.mutable
 
 import chisel3._
 import chisel3.util._
-import chisel3.NotStrict.CompileOptions
-
 
 // Defined outside of the class so we don't get $ in name
 class Other(w: Int) extends Module {
diff --git a/src/test/scala/chiselTests/BlackBox.scala b/src/test/scala/chiselTests/BlackBox.scala
index b26b7d77..465dec4e 100644
--- a/src/test/scala/chiselTests/BlackBox.scala
+++ b/src/test/scala/chiselTests/BlackBox.scala
@@ -8,7 +8,7 @@ import org.scalatest._
 import chisel3._
 import chisel3.testers.BasicTester
 import chisel3.util._
-import chisel3.Strict.CompileOptions
+//import chisel3.ExplicitCompileOptions.Strict
 
 class BlackBoxInverter extends BlackBox {
   val io = IO(new Bundle() {
diff --git a/src/test/scala/chiselTests/BundleWire.scala b/src/test/scala/chiselTests/BundleWire.scala
index 15c5d5f8..07360c34 100644
--- a/src/test/scala/chiselTests/BundleWire.scala
+++ b/src/test/scala/chiselTests/BundleWire.scala
@@ -5,7 +5,7 @@ import chisel3._
 import org.scalatest._
 import org.scalatest.prop._
 import chisel3.testers.BasicTester
-import chisel3.Strict.CompileOptions
+//import chisel3.ExplicitCompileOptions.Strict
 
 class Coord extends Bundle {
   val x = UInt.width( 32)
diff --git a/src/test/scala/chiselTests/CompileOptionsTest.scala b/src/test/scala/chiselTests/CompileOptionsTest.scala
index de75d07b..508c0849 100644
--- a/src/test/scala/chiselTests/CompileOptionsTest.scala
+++ b/src/test/scala/chiselTests/CompileOptionsTest.scala
@@ -5,17 +5,17 @@ package chiselTests
 import org.scalatest._
 import chisel3._
 import chisel3.core.Binding.BindingException
-import chisel3.internal.ExplicitCompileOptions
+import chisel3.ExplicitImplicitCompileOptions
 import chisel3.testers.BasicTester
 
 class CompileOptionsSpec extends ChiselFlatSpec {
 
-  abstract class StrictModule extends Module()(chisel3.Strict.CompileOptions)
-  abstract class NotStrictModule extends Module()(chisel3.NotStrict.CompileOptions)
+  abstract class StrictModule extends Module()(chisel3.ExplicitCompileOptions.Strict)
+  abstract class NotStrictModule extends Module()(chisel3.ExplicitCompileOptions.NotStrict)
 
   // Generate a set of options that do not have requireIOWrap enabled, in order to
   // ensure its definition comes from the implicit options passed to the Module constructor.
-  object StrictWithoutIOWrap extends ExplicitCompileOptions {
+  object StrictWithoutIOWrap extends ExplicitImplicitCompileOptions {
     val connectFieldsMustMatch = true
     val declaredTypeMustBeUnbound = true
     val requireIOWrap = false
@@ -35,7 +35,7 @@ class CompileOptionsSpec extends ChiselFlatSpec {
 
   "A Module with missing bundle fields when compiled with implicit Strict.CompileOption " should "throw an exception" in {
     a [ChiselException] should be thrownBy {
-      import chisel3.Strict.CompileOptions
+      import chisel3.ExplicitCompileOptions.Strict
 
       class ConnectFieldMismatchModule extends Module {
         val io = IO(new Bundle {
@@ -49,7 +49,7 @@ class CompileOptionsSpec extends ChiselFlatSpec {
   }
 
   "A Module with missing bundle fields when compiled with implicit NotStrict.CompileOption " should "not throw an exception" in {
-    import chisel3.NotStrict.CompileOptions
+    import chisel3.ExplicitCompileOptions.NotStrict
 
     class ConnectFieldMismatchModule extends Module {
       val io = IO(new Bundle {
@@ -63,7 +63,7 @@ class CompileOptionsSpec extends ChiselFlatSpec {
 
   "A Module in which a Reg is created with a bound type when compiled with implicit Strict.CompileOption " should "throw an exception" in {
     a [BindingException] should be thrownBy {
-      import chisel3.Strict.CompileOptions
+      import chisel3.ExplicitCompileOptions.Strict
 
       class CreateRegFromBoundTypeModule extends Module {
         val io = IO(new Bundle {
@@ -77,7 +77,7 @@ class CompileOptionsSpec extends ChiselFlatSpec {
   }
 
   "A Module in which a Reg is created with a bound type when compiled with implicit NotStrict.CompileOption " should "not throw an exception" in {
-    import chisel3.NotStrict.CompileOptions
+    import chisel3.ExplicitCompileOptions.NotStrict
 
     class CreateRegFromBoundTypeModule extends Module {
       val io = IO(new Bundle {
@@ -90,7 +90,7 @@ class CompileOptionsSpec extends ChiselFlatSpec {
   }
 
   "A Module with wrapped IO when compiled with implicit Strict.CompileOption " should "not throw an exception" in {
-    import chisel3.Strict.CompileOptions
+    import chisel3.ExplicitCompileOptions.Strict
 
     class RequireIOWrapModule extends Module {
       val io = IO(new Bundle {
@@ -103,7 +103,7 @@ class CompileOptionsSpec extends ChiselFlatSpec {
 }
 
   "A Module with unwrapped IO when compiled with implicit NotStrict.CompileOption " should "not throw an exception" in {
-    import chisel3.NotStrict.CompileOptions
+    import chisel3.ExplicitCompileOptions.NotStrict
 
     class RequireIOWrapModule extends Module {
       val io = new Bundle {
@@ -117,7 +117,7 @@ class CompileOptionsSpec extends ChiselFlatSpec {
 
   "A Module with unwrapped IO when compiled with implicit Strict.CompileOption " should "throw an exception" in {
     a [BindingException] should be thrownBy {
-      import chisel3.Strict.CompileOptions
+      import chisel3.ExplicitCompileOptions.Strict
 
       class RequireIOWrapModule extends Module {
         val io = new Bundle {
@@ -134,7 +134,7 @@ class CompileOptionsSpec extends ChiselFlatSpec {
 
   "A Module connecting output as source to input as sink when compiled with implicit Strict.CompileOption " should "throw an exception" in {
     a [ChiselException] should be thrownBy {
-      import chisel3.Strict.CompileOptions
+      import chisel3.ExplicitCompileOptions.Strict
 
       class SimpleModule extends Module {
         val io = IO(new Bundle {
@@ -151,7 +151,7 @@ class CompileOptionsSpec extends ChiselFlatSpec {
   }
 
   "A Module connecting output as source to input as sink when compiled with implicit NotStrict.CompileOption " should "not throw an exception" in {
-    import chisel3.NotStrict.CompileOptions
+    import chisel3.ExplicitCompileOptions.NotStrict
 
     class SimpleModule extends Module {
       val io = IO(new Bundle {
@@ -170,7 +170,7 @@ class CompileOptionsSpec extends ChiselFlatSpec {
     a [ChiselException] should be thrownBy {
       // Verify we can suppress the inclusion of default compileOptions
       import Chisel.{defaultCompileOptions => _, _}
-      import chisel3.Strict.CompileOptions
+      import chisel3.ExplicitCompileOptions.Strict
 
       class SimpleModule extends Module {
         val io = IO(new Bundle {
@@ -191,7 +191,7 @@ class CompileOptionsSpec extends ChiselFlatSpec {
   }
 
   "A Module with directionless connections when compiled with implicit NotStrict.CompileOption " should "not throw an exception" in {
-    import chisel3.NotStrict.CompileOptions
+    import chisel3.ExplicitCompileOptions.NotStrict
 
     class SimpleModule extends Module {
       val io = IO(new Bundle {
@@ -258,7 +258,7 @@ class CompileOptionsSpec extends ChiselFlatSpec {
 
     object StrictNotIOWrap {
 
-      implicit object CompileOptions extends ExplicitCompileOptions {
+      implicit object CompileOptions extends ExplicitImplicitCompileOptions {
         val connectFieldsMustMatch = true
         val declaredTypeMustBeUnbound = true
         val requireIOWrap = false
diff --git a/src/test/scala/chiselTests/ComplexAssign.scala b/src/test/scala/chiselTests/ComplexAssign.scala
index 48a673cf..0a1f31cc 100644
--- a/src/test/scala/chiselTests/ComplexAssign.scala
+++ b/src/test/scala/chiselTests/ComplexAssign.scala
@@ -8,7 +8,6 @@ import org.scalatest.prop._
 import chisel3._
 import chisel3.testers.BasicTester
 import chisel3.util._
-import chisel3.NotStrict.CompileOptions
 
 class Complex[T <: Data](val re: T, val im: T) extends Bundle {
   override def cloneType: this.type =
diff --git a/src/test/scala/chiselTests/Counter.scala b/src/test/scala/chiselTests/Counter.scala
index 46ab6dfc..69d8a44a 100644
--- a/src/test/scala/chiselTests/Counter.scala
+++ b/src/test/scala/chiselTests/Counter.scala
@@ -8,7 +8,6 @@ import org.scalatest.prop._
 import chisel3._
 import chisel3.testers.BasicTester
 import chisel3.util._
-import chisel3.Strict.CompileOptions
 
 class CountTester(max: Int) extends BasicTester {
   val cnt = Counter(max)
diff --git a/src/test/scala/chiselTests/Decoder.scala b/src/test/scala/chiselTests/Decoder.scala
index 35c83a8a..b50a80c0 100644
--- a/src/test/scala/chiselTests/Decoder.scala
+++ b/src/test/scala/chiselTests/Decoder.scala
@@ -9,7 +9,6 @@ import org.scalacheck._
 import chisel3._
 import chisel3.testers.BasicTester
 import chisel3.util._
-import chisel3.NotStrict.CompileOptions
 
 class Decoder(bitpats: List[String]) extends Module {
   val io = IO(new Bundle {
diff --git a/src/test/scala/chiselTests/DeqIOSpec.scala b/src/test/scala/chiselTests/DeqIOSpec.scala
index 31508149..d41c50e5 100644
--- a/src/test/scala/chiselTests/DeqIOSpec.scala
+++ b/src/test/scala/chiselTests/DeqIOSpec.scala
@@ -5,7 +5,6 @@ package chiselTests
 import chisel3._
 import chisel3.testers.BasicTester
 import chisel3.util._
-import chisel3.NotStrict.CompileOptions
 
 /**
   * Created by chick on 2/8/16.
diff --git a/src/test/scala/chiselTests/Direction.scala b/src/test/scala/chiselTests/Direction.scala
index 7cfe8268..949b92ed 100644
--- a/src/test/scala/chiselTests/Direction.scala
+++ b/src/test/scala/chiselTests/Direction.scala
@@ -6,7 +6,6 @@ import chisel3._
 import org.scalatest._
 import org.scalatest.prop._
 import chisel3.testers.BasicTester
-import chisel3.NotStrict.CompileOptions
 
 class DirectionHaver extends Module {
   val io = IO(new Bundle {
diff --git a/src/test/scala/chiselTests/EnableShiftRegister.scala b/src/test/scala/chiselTests/EnableShiftRegister.scala
index 15173e0f..5f3e0dd1 100644
--- a/src/test/scala/chiselTests/EnableShiftRegister.scala
+++ b/src/test/scala/chiselTests/EnableShiftRegister.scala
@@ -3,7 +3,6 @@
 package chiselTests
 import chisel3._
 import chisel3.testers.BasicTester
-import chisel3.NotStrict.CompileOptions
 
 class EnableShiftRegister extends Module {
   val io = IO(new Bundle {
diff --git a/src/test/scala/chiselTests/GCD.scala b/src/test/scala/chiselTests/GCD.scala
index 21082fc9..d683ce34 100644
--- a/src/test/scala/chiselTests/GCD.scala
+++ b/src/test/scala/chiselTests/GCD.scala
@@ -6,7 +6,6 @@ import chisel3._
 import chisel3.testers.BasicTester
 import org.scalatest._
 import org.scalatest.prop._
-import chisel3.NotStrict.CompileOptions
 
 class GCD extends Module {
   val io = IO(new Bundle {
diff --git a/src/test/scala/chiselTests/IOCompatibility.scala b/src/test/scala/chiselTests/IOCompatibility.scala
index d100df2b..7bf3dded 100644
--- a/src/test/scala/chiselTests/IOCompatibility.scala
+++ b/src/test/scala/chiselTests/IOCompatibility.scala
@@ -3,23 +3,22 @@
 package chiselTests
 
 import chisel3._
-import chisel3.NotStrict.CompileOptions
 
 class IOCSimpleIO extends Bundle {
-  val in  = UInt(INPUT,  32)
-  val out = UInt(OUTPUT, 32)
+  val in  = Input(UInt(width=32))
+  val out = Output(UInt(width=32))
 }
 
 class IOCPlusOne extends Module {
-  val io = new IOCSimpleIO
+  val io = IO(new IOCSimpleIO)
   io.out := io.in + UInt(1)
 }
 
 class IOCModuleVec(val n: Int) extends Module {
-  val io = new Bundle {
-    val ins  = Vec(n, UInt(INPUT,  32))
-    val outs = Vec(n, UInt(OUTPUT, 32))
-  }
+  val io = IO(new Bundle {
+    val ins  = Vec(n, Input(UInt(width=32)))
+    val outs = Vec(n, Output(UInt(width=32)))
+  })
   val pluses = Vec.fill(n){ Module(new IOCPlusOne).io }
   for (i <- 0 until n) {
     pluses(i).in := io.ins(i)
@@ -28,7 +27,7 @@ class IOCModuleVec(val n: Int) extends Module {
 }
 
 class IOCModuleWire extends Module {
-  val io = new IOCSimpleIO
+  val io = IO(new IOCSimpleIO)
   val inc = Wire(Module(new IOCPlusOne).io.chiselCloneType)
   inc.in := io.in
   io.out := inc.out
diff --git a/src/test/scala/chiselTests/LFSR16.scala b/src/test/scala/chiselTests/LFSR16.scala
index 3b2b28f6..b13b67e3 100644
--- a/src/test/scala/chiselTests/LFSR16.scala
+++ b/src/test/scala/chiselTests/LFSR16.scala
@@ -5,7 +5,6 @@ package chiselTests
 import chisel3._
 import chisel3.testers.BasicTester
 import chisel3.util._
-import chisel3.NotStrict.CompileOptions
 
 class LFSR16 extends Module {
   val io = IO(new Bundle {
diff --git a/src/test/scala/chiselTests/MemorySearch.scala b/src/test/scala/chiselTests/MemorySearch.scala
index a2a8eb8b..1d09f3c5 100644
--- a/src/test/scala/chiselTests/MemorySearch.scala
+++ b/src/test/scala/chiselTests/MemorySearch.scala
@@ -4,7 +4,6 @@ package chiselTests
 
 import chisel3._
 import chisel3.testers.BasicTester
-import chisel3.NotStrict.CompileOptions
 
 class MemorySearch extends Module {
   val io = IO(new Bundle {
diff --git a/src/test/scala/chiselTests/Module.scala b/src/test/scala/chiselTests/Module.scala
index 1f0ab084..7a4050db 100644
--- a/src/test/scala/chiselTests/Module.scala
+++ b/src/test/scala/chiselTests/Module.scala
@@ -3,7 +3,6 @@
 package chiselTests
 
 import chisel3._
-import chisel3.NotStrict.CompileOptions
 
 class SimpleIO extends Bundle {
   val in  = Input(UInt.width(32))
diff --git a/src/test/scala/chiselTests/MulLookup.scala b/src/test/scala/chiselTests/MulLookup.scala
index 4548ae40..26ee4e03 100644
--- a/src/test/scala/chiselTests/MulLookup.scala
+++ b/src/test/scala/chiselTests/MulLookup.scala
@@ -6,7 +6,6 @@ import chisel3._
 import org.scalatest._
 import org.scalatest.prop._
 import chisel3.testers.BasicTester
-import chisel3.NotStrict.CompileOptions
 
 class MulLookup(val w: Int) extends Module {
   val io = IO(new Bundle {
diff --git a/src/test/scala/chiselTests/MultiAssign.scala b/src/test/scala/chiselTests/MultiAssign.scala
index 8fc1d0cb..fa4c4898 100644
--- a/src/test/scala/chiselTests/MultiAssign.scala
+++ b/src/test/scala/chiselTests/MultiAssign.scala
@@ -7,7 +7,6 @@ import org.scalatest._
 import chisel3._
 import chisel3.testers.BasicTester
 import chisel3.util._
-import chisel3.Strict.CompileOptions
 
 class LastAssignTester() extends BasicTester {
   val cnt = Counter(2)
diff --git a/src/test/scala/chiselTests/OptionBundle.scala b/src/test/scala/chiselTests/OptionBundle.scala
index d2165f62..8e4c7579 100644
--- a/src/test/scala/chiselTests/OptionBundle.scala
+++ b/src/test/scala/chiselTests/OptionBundle.scala
@@ -5,7 +5,6 @@ package chiselTests
 import org.scalatest._
 import chisel3._
 import chisel3.testers.BasicTester
-import chisel3.NotStrict.CompileOptions
 
 class OptionBundle(hasIn: Boolean) extends Bundle {
   val in = if (hasIn) {
diff --git a/src/test/scala/chiselTests/Padding.scala b/src/test/scala/chiselTests/Padding.scala
index c7265c6c..42df6802 100644
--- a/src/test/scala/chiselTests/Padding.scala
+++ b/src/test/scala/chiselTests/Padding.scala
@@ -3,7 +3,6 @@
 package chiselTests
 
 import chisel3._
-import chisel3.NotStrict.CompileOptions
 
 class Padder extends Module {
   val io = IO(new Bundle {
diff --git a/src/test/scala/chiselTests/ParameterizedModule.scala b/src/test/scala/chiselTests/ParameterizedModule.scala
index b75d898b..14b21631 100644
--- a/src/test/scala/chiselTests/ParameterizedModule.scala
+++ b/src/test/scala/chiselTests/ParameterizedModule.scala
@@ -5,7 +5,6 @@ package chiselTests
 import org.scalatest._
 import chisel3._
 import chisel3.testers.BasicTester
-import chisel3.NotStrict.CompileOptions
 
 class ParameterizedModule(invert: Boolean) extends Module {
   val io = IO(new Bundle {
diff --git a/src/test/scala/chiselTests/PrintableSpec.scala b/src/test/scala/chiselTests/PrintableSpec.scala
index afef3c54..12564a40 100644
--- a/src/test/scala/chiselTests/PrintableSpec.scala
+++ b/src/test/scala/chiselTests/PrintableSpec.scala
@@ -5,7 +5,6 @@ import scala.collection.mutable
 
 import chisel3._
 import chisel3.testers.BasicTester
-import chisel3.Strict.CompileOptions
 
 /* Printable Tests */
 class PrintableSpec extends FlatSpec with Matchers {
diff --git a/src/test/scala/chiselTests/Reg.scala b/src/test/scala/chiselTests/Reg.scala
index 741393b0..a9086223 100644
--- a/src/test/scala/chiselTests/Reg.scala
+++ b/src/test/scala/chiselTests/Reg.scala
@@ -6,7 +6,6 @@ import org.scalatest._
 import chisel3._
 import chisel3.core.DataMirror
 import chisel3.testers.BasicTester
-import chisel3.Strict.CompileOptions
 
 class RegSpec extends ChiselFlatSpec {
   "A Reg" should "throw an exception if not given any parameters" in {
diff --git a/src/test/scala/chiselTests/Risc.scala b/src/test/scala/chiselTests/Risc.scala
index e27cbdca..6d5a0a76 100644
--- a/src/test/scala/chiselTests/Risc.scala
+++ b/src/test/scala/chiselTests/Risc.scala
@@ -4,7 +4,6 @@ package chiselTests
 
 import chisel3._
 import chisel3.util._
-import chisel3.NotStrict.CompileOptions
 
 class Risc extends Module {
   val io = IO(new Bundle {
diff --git a/src/test/scala/chiselTests/SIntOps.scala b/src/test/scala/chiselTests/SIntOps.scala
index d070295c..418318fb 100644
--- a/src/test/scala/chiselTests/SIntOps.scala
+++ b/src/test/scala/chiselTests/SIntOps.scala
@@ -4,7 +4,7 @@ package chiselTests
 
 import chisel3._
 import chisel3.testers.BasicTester
-import chisel3.NotStrict.CompileOptions
+//import chisel3.ExplicitCompileOptions.NotStrict
 
 class SIntOps extends Module {
   val io = IO(new Bundle {
diff --git a/src/test/scala/chiselTests/Stack.scala b/src/test/scala/chiselTests/Stack.scala
index f1210260..937f1978 100644
--- a/src/test/scala/chiselTests/Stack.scala
+++ b/src/test/scala/chiselTests/Stack.scala
@@ -6,7 +6,7 @@ import scala.collection.mutable.Stack
 
 import chisel3._
 import chisel3.util._
-import chisel3.NotStrict.CompileOptions
+//import chisel3.ExplicitCompileOptions.NotStrict
 
 class ChiselStack(val depth: Int) extends Module {
   val io = IO(new Bundle {
diff --git a/src/test/scala/chiselTests/Tbl.scala b/src/test/scala/chiselTests/Tbl.scala
index df8ce02c..5ff1aa31 100644
--- a/src/test/scala/chiselTests/Tbl.scala
+++ b/src/test/scala/chiselTests/Tbl.scala
@@ -8,7 +8,7 @@ import org.scalatest.prop._
 import chisel3._
 import chisel3.testers.BasicTester
 import chisel3.util._
-import chisel3.NotStrict.CompileOptions
+//import chisel3.ExplicitCompileOptions.NotStrict
 
 class Tbl(w: Int, n: Int) extends Module {
   val io = IO(new Bundle {
diff --git a/src/test/scala/chiselTests/TesterDriverSpec.scala b/src/test/scala/chiselTests/TesterDriverSpec.scala
index 6dc075d7..a5351763 100644
--- a/src/test/scala/chiselTests/TesterDriverSpec.scala
+++ b/src/test/scala/chiselTests/TesterDriverSpec.scala
@@ -5,7 +5,7 @@ package chiselTests
 import chisel3._
 import chisel3.testers.BasicTester
 import chisel3.util._
-import chisel3.Strict.CompileOptions
+//import chisel3.ExplicitCompileOptions.Strict
 
 /** Extend BasicTester with a simple circuit and finish method.  TesterDriver will call the
   * finish method after the FinishTester's constructor has completed, which will alter the
diff --git a/src/test/scala/chiselTests/UIntOps.scala b/src/test/scala/chiselTests/UIntOps.scala
index 237cea16..d80d6f17 100644
--- a/src/test/scala/chiselTests/UIntOps.scala
+++ b/src/test/scala/chiselTests/UIntOps.scala
@@ -5,7 +5,7 @@ package chiselTests
 import chisel3._
 import org.scalatest._
 import chisel3.testers.BasicTester
-import chisel3.NotStrict.CompileOptions
+//import chisel3.ExplicitCompileOptions.NotStrict
 
 class UIntOps extends Module {
   val io = IO(new Bundle {
diff --git a/src/test/scala/chiselTests/Vec.scala b/src/test/scala/chiselTests/Vec.scala
index abe483a4..a7dd975f 100644
--- a/src/test/scala/chiselTests/Vec.scala
+++ b/src/test/scala/chiselTests/Vec.scala
@@ -8,7 +8,7 @@ import org.scalatest.prop._
 import chisel3._
 import chisel3.testers.BasicTester
 import chisel3.util._
-import chisel3.Strict.CompileOptions
+//import chisel3.ExplicitCompileOptions.Strict
 
 class ValueTester(w: Int, values: List[Int]) extends BasicTester {
   val v = Vec(values.map(UInt(_, width = w))) // TODO: does this need a Wire? Why no error?
diff --git a/src/test/scala/chiselTests/VectorPacketIO.scala b/src/test/scala/chiselTests/VectorPacketIO.scala
index 588e1ce2..221fd6d8 100644
--- a/src/test/scala/chiselTests/VectorPacketIO.scala
+++ b/src/test/scala/chiselTests/VectorPacketIO.scala
@@ -5,7 +5,7 @@ package chiselTests
 import chisel3._
 import chisel3.testers.BasicTester
 import chisel3.util._
-import chisel3.NotStrict.CompileOptions
+//import chisel3.ExplicitCompileOptions.NotStrict
 
 /**
   * This test used to fail when assignment statements were
diff --git a/src/test/scala/chiselTests/VendingMachine.scala b/src/test/scala/chiselTests/VendingMachine.scala
index 2a0ac824..5f65659b 100644
--- a/src/test/scala/chiselTests/VendingMachine.scala
+++ b/src/test/scala/chiselTests/VendingMachine.scala
@@ -4,7 +4,7 @@ package chiselTests
 
 import chisel3._
 import chisel3.util._
-import chisel3.NotStrict.CompileOptions
+//import chisel3.ExplicitCompileOptions.NotStrict
 
 class VendingMachine extends Module {
   val io = IO(new Bundle {
diff --git a/src/test/scala/chiselTests/When.scala b/src/test/scala/chiselTests/When.scala
index 1920b30e..0183c29b 100644
--- a/src/test/scala/chiselTests/When.scala
+++ b/src/test/scala/chiselTests/When.scala
@@ -7,7 +7,7 @@ import org.scalatest._
 import chisel3._
 import chisel3.testers.BasicTester
 import chisel3.util._
-import chisel3.Strict.CompileOptions
+//import chisel3.ExplicitCompileOptions.Strict
 
 class WhenTester() extends BasicTester {
   val cnt = Counter(4)