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authorJack Koenig2019-03-29 15:10:13 -0700
committerGitHub2019-03-29 15:10:13 -0700
commit69e8250dd47210cee809c9ae231c1e320d76c084 (patch)
treeaa639ef424141d07adfaadb06712a90ebbe34a14 /src/test
parent0d00420ba2d00a957ace9112ab570fe52abea9d3 (diff)
Ignore empty aggregates elements when binding aggregate direction (#946)
Previously, including an empty aggregate in a Bundle would cause a MixedDirectionAggregateException because it has no elements and thus doesn't have a direction * Add SampleElementBinding for Vec sample elements * Add ActualDirection.Empty for bound empty aggregates
Diffstat (limited to 'src/test')
-rw-r--r--src/test/scala/chiselTests/Direction.scala66
1 files changed, 66 insertions, 0 deletions
diff --git a/src/test/scala/chiselTests/Direction.scala b/src/test/scala/chiselTests/Direction.scala
index 5f8c4f9b..32e5a4fd 100644
--- a/src/test/scala/chiselTests/Direction.scala
+++ b/src/test/scala/chiselTests/Direction.scala
@@ -61,6 +61,72 @@ class DirectionSpec extends ChiselPropSpec with Matchers {
elaborate(new TopDirectionOutput)
}
+ property("Empty Vecs with directioned sample_element should not cause direction errors") {
+ elaborate(new Module {
+ val io = IO(new Bundle {
+ val foo = Input(UInt(8.W))
+ val x = Vec(0, Output(UInt(8.W)))
+ })
+ })
+ elaborate(new Module {
+ val io = IO(new Bundle {
+ val foo = Input(UInt(8.W))
+ val x = Flipped(Vec(0, Output(UInt(8.W))))
+ })
+ })
+ elaborate(new Module {
+ val io = IO(new Bundle {
+ val foo = Input(UInt(8.W))
+ val x = Output(Vec(0, UInt(8.W)))
+ })
+ })
+ }
+
+ property("Empty Vecs with no direction on the sample_element *should* cause direction errors") {
+ an [Exception] should be thrownBy {
+ elaborate(new Module {
+ val io = IO(new Bundle {
+ val foo = Input(UInt(8.W))
+ val x = Vec(0, UInt(8.W))
+ })
+ })
+ }
+ }
+
+ property("Empty Bundles should not cause direction errors") {
+ elaborate(new Module {
+ val io = IO(new Bundle {
+ val foo = Input(UInt(8.W))
+ val x = new Bundle {}
+ })
+ })
+ elaborate(new Module {
+ val io = IO(new Bundle {
+ val foo = Input(UInt(8.W))
+ val x = Flipped(new Bundle {})
+ })
+ })
+ elaborate(new Module {
+ val io = IO(new Bundle {
+ val foo = Input(UInt(8.W))
+ val x = new Bundle {
+ val y = if (false) Some(Input(UInt(8.W))) else None
+ }
+ })
+ })
+ }
+
+ property("Explicitly directioned but empty Bundles should cause direction errors") {
+ an [Exception] should be thrownBy {
+ elaborate(new Module {
+ val io = IO(new Bundle {
+ val foo = UInt(8.W)
+ val x = Input(new Bundle {})
+ })
+ })
+ }
+ }
+
import chisel3.experimental.{MultiIOModule, DataMirror, Direction}
import chisel3.core.SpecifiedDirection