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authorJiuyang Liu2021-11-16 04:20:50 +0800
committerGitHub2021-11-16 04:20:50 +0800
commit670c539110a599642d700323a34159be0f5abb12 (patch)
tree79a969333c9af8fdd3208890bf4a419f4fc3b6d5 /src/test
parent4606b30b02284ab82dd46f2345ecb96c39e57c99 (diff)
parent8c24afd170bdc32e8220f493fc7c64b5e7bd01e8 (diff)
Merge pull request #2170 from chipsalliance/remove_toBools
Remove toBools
Diffstat (limited to 'src/test')
-rw-r--r--src/test/scala/chiselTests/CompatibilitySpec.scala3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/test/scala/chiselTests/CompatibilitySpec.scala b/src/test/scala/chiselTests/CompatibilitySpec.scala
index ccf287a6..7ac67b7c 100644
--- a/src/test/scala/chiselTests/CompatibilitySpec.scala
+++ b/src/test/scala/chiselTests/CompatibilitySpec.scala
@@ -536,6 +536,9 @@ class CompatibiltySpec extends ChiselFlatSpec with ScalaCheckDrivenPropertyCheck
info("toUInt works")
s.toUInt shouldBe a [UInt]
+
+ info("toBools works")
+ s.toBools shouldBe a [Seq[Bool]]
}
ChiselStage.elaborate(new Foo)