diff options
| author | Jack Koenig | 2021-06-29 17:44:35 -0700 |
|---|---|---|
| committer | GitHub | 2021-06-29 17:44:35 -0700 |
| commit | 1bf2d53046bdac65013f2e32f8c087f881a959b8 (patch) | |
| tree | d5dbd592ceed3040209bb74dfe1928b983052c08 /src/test | |
| parent | 8724cd542df2e907069d9ee3fd7d1675a9ca9287 (diff) | |
| parent | 25a84b5667614ea3f437b656f1939caba57e6f66 (diff) | |
Merge pull request #1993 from chipsalliance/fix-select-clonemoduleasrecord
Fix aop.Select behavior for CloneModuleAsRecord
Diffstat (limited to 'src/test')
| -rw-r--r-- | src/test/scala/chiselTests/aop/SelectSpec.scala | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/src/test/scala/chiselTests/aop/SelectSpec.scala b/src/test/scala/chiselTests/aop/SelectSpec.scala index 91353f5a..14ae202d 100644 --- a/src/test/scala/chiselTests/aop/SelectSpec.scala +++ b/src/test/scala/chiselTests/aop/SelectSpec.scala @@ -153,5 +153,31 @@ class SelectSpec extends ChiselFlatSpec { assert(bbs.size == 1) } + "CloneModuleAsRecord" should "NOT show up in Select aspects" in { + import chisel3.experimental.CloneModuleAsRecord + class Child extends RawModule { + val in = IO(Input(UInt(8.W))) + val out = IO(Output(UInt(8.W))) + out := in + } + class Top extends MultiIOModule { + val in = IO(Input(UInt(8.W))) + val out = IO(Output(UInt(8.W))) + val inst0 = Module(new Child) + val inst1 = CloneModuleAsRecord(inst0) + inst0.in := in + inst1("in") := inst0.out + out := inst1("out") + } + val top = ChiselGeneratorAnnotation(() => { + new Top() + }).elaborate + .collectFirst { case DesignAnnotation(design: Top) => design } + .get + Select.collectDeep(top) { case x => x } should equal (Seq(top, top.inst0)) + Select.getDeep(top)(x => Seq(x)) should equal (Seq(top, top.inst0)) + Select.instances(top) should equal (Seq(top.inst0)) + } + } |
