diff options
| author | Jack Koenig | 2020-11-10 18:40:51 -0800 |
|---|---|---|
| committer | GitHub | 2020-11-11 02:40:51 +0000 |
| commit | 1260f7c89f1b95bdb00e56e49edb73dc2eac3a0e (patch) | |
| tree | 8f349d91946fd43b7bf0d8ed9987404c0a49b7a1 /src/test | |
| parent | 8187318e7aef42d541ce307f93d9fc946ed4c38d (diff) | |
Refine autonaming to have more intuitive behavior (#1660)
* Refine autonaming to have more intuitive behavior
Last name in an Expression wins, while the first Statement to name wins.
This is done via checking the _id of HasIds during autonaming and only
applying a name if the HasId was created in the scope of autonaming.
There is no change to .autoSeed or .suggestName behavior.
Behavior of chisel3-plugins from before this change is maintained.
* Update docs with naming plugin changes
Diffstat (limited to 'src/test')
| -rw-r--r-- | src/test/scala/chiselTests/naming/NamePluginSpec.scala | 117 |
1 files changed, 116 insertions, 1 deletions
diff --git a/src/test/scala/chiselTests/naming/NamePluginSpec.scala b/src/test/scala/chiselTests/naming/NamePluginSpec.scala index 0f9533e4..5e7133d1 100644 --- a/src/test/scala/chiselTests/naming/NamePluginSpec.scala +++ b/src/test/scala/chiselTests/naming/NamePluginSpec.scala @@ -166,7 +166,7 @@ class NamePluginSpec extends ChiselFlatSpec with Utils { } } - "Multiple names on a non-IO" should "get the last name" in { + "Multiple names on a non-IO" should "get the first name" in { class Test extends MultiIOModule { { val a = Wire(UInt(3.W)) @@ -176,6 +176,73 @@ class NamePluginSpec extends ChiselFlatSpec with Utils { aspectTest(() => new Test) { top: Test => + Select.wires(top).map(_.instanceName) should be (List("a")) + } + } + + "Outer Expression, First Statement naming" should "apply to IO" in { + class Test extends RawModule { + { + val widthOpt: Option[Int] = Some(4) + val out = widthOpt.map { w => + val port = IO(Output(UInt(w.W))) + port + } + val foo = out + val bar = out.get + } + } + + aspectTest(() => new Test) { + top: Test => + Select.ios(top).map(_.instanceName) should be (List("out")) + } + } + + "Outer Expression, First Statement naming" should "apply to non-IO" in { + class Test extends RawModule { + { + val widthOpt: Option[Int] = Some(4) + val fizz = widthOpt.map { w => + val wire = Wire(UInt(w.W)) + wire + } + val foo = fizz + val bar = fizz.get + } + } + + aspectTest(() => new Test) { + top: Test => + Select.wires(top).map(_.instanceName) should be (List("fizz")) + } + } + + "autoSeed" should "NOT override automatic naming for IO" in { + class Test extends RawModule { + { + val a = IO(Output(UInt(3.W))) + a.autoSeed("b") + } + } + + aspectTest(() => new Test) { + top: Test => + Select.ios(top).map(_.instanceName) should be (List("a")) + } + } + + + "autoSeed" should "override automatic naming for non-IO" in { + class Test extends MultiIOModule { + { + val a = Wire(UInt(3.W)) + a.autoSeed("b") + } + } + + aspectTest(() => new Test) { + top: Test => Select.wires(top).map(_.instanceName) should be (List("b")) } } @@ -193,6 +260,54 @@ class NamePluginSpec extends ChiselFlatSpec with Utils { } } + "Unapply assignments" should "not override already named things" in { + class Test extends MultiIOModule { + { + val x = Wire(UInt(3.W)) + val (a, b) = (x, Wire(UInt(3.W))) + } + } + + aspectTest(() => new Test) { + top: Test => + Select.wires(top).map(_.instanceName) should be (List("x", "b")) + } + } + + "Case class unapply assignments" should "be named" in { + case class Foo(x: UInt, y: UInt) + class Test extends MultiIOModule { + { + def func() = Foo(Wire(UInt(3.W)), Wire(UInt(3.W))) + val Foo(a, b) = func() + } + } + + aspectTest(() => new Test) { + top: Test => + Select.wires(top).map(_.instanceName) should be (List("a", "b")) + } + } + + "Complex unapply assignments" should "be named" in { + case class Foo(x: UInt, y: UInt) + class Test extends MultiIOModule { + { + val w = Wire(UInt(3.W)) + def func() = { + val x = Foo(Wire(UInt(3.W)), Wire(UInt(3.W))) + (x, w) :: Nil + } + val ((Foo(a, _), c) :: Nil) = func() + } + } + + aspectTest(() => new Test) { + top: Test => + Select.wires(top).map(_.instanceName) should be (List("w", "a", "_WIRE")) + } + } + "Recursive types" should "not infinitely loop" in { // When this fails, it causes a StackOverflow when compiling the tests // Unfortunately, this doesn't seem to work with assertCompiles(...), it probably ignores the |
