Add Cookbook examples Reg of Vec and FSM (#404)

2 files changed, 94 insertions, 0 deletions

diff --git a/src/test/scala/cookbook/FSM.scala b/src/test/scala/cookbook/FSM.scala
new file mode 100644
index 00000000..58f6a9a2
--- /dev/null
+++ b/src/test/scala/cookbook/FSM.scala
@@ -0,0 +1,61 @@
+// See LICENSE for license details.
+
+package cookbook
+
+import chisel3._
+import chisel3.util._
+
+/* ### How do I create a finite state machine?
+
+ * Use Chisel Enum to construct the states and switch & is to construct the FSM
+ * control logic
+ */
+class DetectTwoOnes extends Module {
+  val io = IO(new Bundle {
+    val in = Input(Bool())
+    val out = Output(Bool())
+  })
+
+  val sNone :: sOne1 :: sTwo1s :: Nil = Enum(3)
+  val state = Reg(init = sNone)
+
+  io.out := (state === sTwo1s)
+
+  switch (state) {
+    is (sNone) {
+      when (io.in) {
+        state := sOne1
+      }
+    }
+    is (sOne1) {
+      when (io.in) {
+        state := sTwo1s
+      } .otherwise {
+        state := sNone
+      }
+    }
+    is (sTwo1s) {
+      when (!io.in) {
+        state := sNone
+      }
+    }
+  }
+}
+
+class DetectTwoOnesTester extends CookbookTester(10) {
+
+  val dut = Module(new DetectTwoOnes)
+
+  // Inputs and expected results
+  val inputs: Vec[Bool] = Vec(false.B, true.B, false.B, true.B, true.B, true.B, false.B, true.B, true.B, false.B)
+  val expected: Vec[Bool] = Vec(false.B, false.B, false.B, false.B, false.B, true.B, true.B, false.B, false.B, true.B)
+
+  dut.io.in := inputs(cycle)
+  assert(dut.io.out === expected(cycle))
+}
+
+class FSMSpec extends CookbookSpec {
+  "DetectTwoOnes" should "work" in {
+    assertTesterPasses { new DetectTwoOnesTester }
+  }
+}
diff --git a/src/test/scala/cookbook/RegOfVec.scala b/src/test/scala/cookbook/RegOfVec.scala
new file mode 100644
index 00000000..3e55acff
--- /dev/null
+++ b/src/test/scala/cookbook/RegOfVec.scala
@@ -0,0 +1,33 @@
+// See LICENSE for license details.
+
+package cookbook
+
+import chisel3._
+
+/* ### How do I create a Reg of type Vec?
+ *
+ * For information, please see the API documentation for Vec
+ * (https://chisel.eecs.berkeley.edu/api/index.html#chisel3.core.Vec)
+ */
+class RegOfVec extends CookbookTester(2) {
+  // Reg of Vec of 32-bit UInts without initialization
+  val regOfVec = Reg(Vec(4, UInt(32.W)))
+  regOfVec(0) := 123.U // a couple of assignments
+  regOfVec(2) := regOfVec(0)
+
+  // Reg of Vec of 32-bit UInts initialized to zero
+  //   Note that Seq.fill constructs 4 32-bit UInt literals with the value 0
+  //   Vec(...) then constructs a Wire of these literals
+  //   The Reg is then initialized to the value of the Wire (which gives it the same type)
+  val initRegOfVec = Reg(init = Vec(Seq.fill(4)(0.asUInt(32.W))))
+
+  // Simple test (cycle comes from superclass)
+  when (cycle === 2.U) { assert(regOfVec(2) === 123.U) }
+  for (elt <- initRegOfVec) { assert(elt === 0.U) }
+}
+
+class RegOfVecSpec  extends CookbookSpec {
+  "RegOfVec" should "work" in {
+    assertTesterPasses { new RegOfVec }
+  }
+}