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authorJim Lawson2016-09-01 10:21:57 -0700
committerJim Lawson2016-09-01 13:08:44 -0700
commit4b88a5dd45337fa88178fe17324eef3661daf1b3 (patch)
tree225f34b9f0093b0f59bb66edacbb4cc2341a6d0b /src/test/scala
parent4e7e1c2b30bfa06f167b04aae4ef6944794323a9 (diff)
Move connection implicits from Module constructor to connection methods.
Eliminate builder compileOptions.
Diffstat (limited to 'src/test/scala')
-rw-r--r--src/test/scala/chiselTests/BlackBox.scala1
-rw-r--r--src/test/scala/chiselTests/CompileOptionsTest.scala25
-rw-r--r--src/test/scala/chiselTests/Counter.scala1
-rw-r--r--src/test/scala/chiselTests/MultiAssign.scala1
-rw-r--r--src/test/scala/chiselTests/Reg.scala1
-rw-r--r--src/test/scala/chiselTests/TesterDriverSpec.scala1
-rw-r--r--src/test/scala/chiselTests/Vec.scala1
-rw-r--r--src/test/scala/chiselTests/When.scala1
8 files changed, 26 insertions, 6 deletions
diff --git a/src/test/scala/chiselTests/BlackBox.scala b/src/test/scala/chiselTests/BlackBox.scala
index c1154883..b26b7d77 100644
--- a/src/test/scala/chiselTests/BlackBox.scala
+++ b/src/test/scala/chiselTests/BlackBox.scala
@@ -8,6 +8,7 @@ import org.scalatest._
import chisel3._
import chisel3.testers.BasicTester
import chisel3.util._
+import chisel3.Strict.CompileOptions
class BlackBoxInverter extends BlackBox {
val io = IO(new Bundle() {
diff --git a/src/test/scala/chiselTests/CompileOptionsTest.scala b/src/test/scala/chiselTests/CompileOptionsTest.scala
index 70843c3e..f835ab0d 100644
--- a/src/test/scala/chiselTests/CompileOptionsTest.scala
+++ b/src/test/scala/chiselTests/CompileOptionsTest.scala
@@ -13,6 +13,16 @@ class CompileOptionsSpec extends ChiselFlatSpec {
abstract class StrictModule extends Module()(chisel3.Strict.CompileOptions)
abstract class NotStrictModule extends Module()(chisel3.NotStrict.CompileOptions)
+ // Generate a set of options that do not have requireIOWrap enabled, in order to
+ // ensure its definition comes from the implicit options passed to the Module constructor.
+ object StrictWithoutIOWrap extends ExplicitCompileOptions {
+ val connectFieldsMustMatch = true
+ val declaredTypeMustBeUnbound = true
+ val requireIOWrap = false
+ val dontTryConnectionsSwapped = true
+ val dontAssumeDirectionality = true
+ }
+
class SmallBundle extends Bundle {
val f1 = UInt(width = 4)
val f2 = UInt(width = 5)
@@ -199,7 +209,7 @@ class CompileOptionsSpec extends ChiselFlatSpec {
}
"A Module with wrapped IO when compiled with explicit Strict.CompileOption " should "not throw an exception" in {
-
+ implicit val strictWithoutIOWrap = StrictWithoutIOWrap
class RequireIOWrapModule extends StrictModule {
val io = IO(new Bundle {
val in = UInt(width = 32).asInput
@@ -207,11 +217,13 @@ class CompileOptionsSpec extends ChiselFlatSpec {
})
io.out := io.in(1)
}
- elaborate { new RequireIOWrapModule() }
+ elaborate {
+ new RequireIOWrapModule()
+ }
}
"A Module with unwrapped IO when compiled with explicit NotStrict.CompileOption " should "not throw an exception" in {
-
+ implicit val strictWithoutIOWrap = StrictWithoutIOWrap
class RequireIOWrapModule extends NotStrictModule {
val io = new Bundle {
val in = UInt(width = 32).asInput
@@ -219,12 +231,14 @@ class CompileOptionsSpec extends ChiselFlatSpec {
}
io.out := io.in(1)
}
- elaborate { new RequireIOWrapModule() }
+ elaborate {
+ new RequireIOWrapModule()
+ }
}
"A Module with unwrapped IO when compiled with explicit Strict.CompileOption " should "throw an exception" in {
a [BindingException] should be thrownBy {
-
+ implicit val strictWithoutIOWrap = StrictWithoutIOWrap
class RequireIOWrapModule extends StrictModule {
val io = new Bundle {
val in = UInt(width = 32).asInput
@@ -256,7 +270,6 @@ class CompileOptionsSpec extends ChiselFlatSpec {
val in = UInt(width = 32).asInput
val out = Bool().asOutput
}
- io.out := io.in(1)
}
elaborate {
new NotIOWrapModule()
diff --git a/src/test/scala/chiselTests/Counter.scala b/src/test/scala/chiselTests/Counter.scala
index 69d8a44a..46ab6dfc 100644
--- a/src/test/scala/chiselTests/Counter.scala
+++ b/src/test/scala/chiselTests/Counter.scala
@@ -8,6 +8,7 @@ import org.scalatest.prop._
import chisel3._
import chisel3.testers.BasicTester
import chisel3.util._
+import chisel3.Strict.CompileOptions
class CountTester(max: Int) extends BasicTester {
val cnt = Counter(max)
diff --git a/src/test/scala/chiselTests/MultiAssign.scala b/src/test/scala/chiselTests/MultiAssign.scala
index fa4c4898..8fc1d0cb 100644
--- a/src/test/scala/chiselTests/MultiAssign.scala
+++ b/src/test/scala/chiselTests/MultiAssign.scala
@@ -7,6 +7,7 @@ import org.scalatest._
import chisel3._
import chisel3.testers.BasicTester
import chisel3.util._
+import chisel3.Strict.CompileOptions
class LastAssignTester() extends BasicTester {
val cnt = Counter(2)
diff --git a/src/test/scala/chiselTests/Reg.scala b/src/test/scala/chiselTests/Reg.scala
index a9086223..741393b0 100644
--- a/src/test/scala/chiselTests/Reg.scala
+++ b/src/test/scala/chiselTests/Reg.scala
@@ -6,6 +6,7 @@ import org.scalatest._
import chisel3._
import chisel3.core.DataMirror
import chisel3.testers.BasicTester
+import chisel3.Strict.CompileOptions
class RegSpec extends ChiselFlatSpec {
"A Reg" should "throw an exception if not given any parameters" in {
diff --git a/src/test/scala/chiselTests/TesterDriverSpec.scala b/src/test/scala/chiselTests/TesterDriverSpec.scala
index 23eed15f..6dc075d7 100644
--- a/src/test/scala/chiselTests/TesterDriverSpec.scala
+++ b/src/test/scala/chiselTests/TesterDriverSpec.scala
@@ -5,6 +5,7 @@ package chiselTests
import chisel3._
import chisel3.testers.BasicTester
import chisel3.util._
+import chisel3.Strict.CompileOptions
/** Extend BasicTester with a simple circuit and finish method. TesterDriver will call the
* finish method after the FinishTester's constructor has completed, which will alter the
diff --git a/src/test/scala/chiselTests/Vec.scala b/src/test/scala/chiselTests/Vec.scala
index e8bd66bd..abe483a4 100644
--- a/src/test/scala/chiselTests/Vec.scala
+++ b/src/test/scala/chiselTests/Vec.scala
@@ -8,6 +8,7 @@ import org.scalatest.prop._
import chisel3._
import chisel3.testers.BasicTester
import chisel3.util._
+import chisel3.Strict.CompileOptions
class ValueTester(w: Int, values: List[Int]) extends BasicTester {
val v = Vec(values.map(UInt(_, width = w))) // TODO: does this need a Wire? Why no error?
diff --git a/src/test/scala/chiselTests/When.scala b/src/test/scala/chiselTests/When.scala
index 07ab3444..1920b30e 100644
--- a/src/test/scala/chiselTests/When.scala
+++ b/src/test/scala/chiselTests/When.scala
@@ -7,6 +7,7 @@ import org.scalatest._
import chisel3._
import chisel3.testers.BasicTester
import chisel3.util._
+import chisel3.Strict.CompileOptions
class WhenTester() extends BasicTester {
val cnt = Counter(4)