diff options
| author | Martin Schoeberl | 2019-01-25 23:24:01 -0800 |
|---|---|---|
| committer | Richard Lin | 2019-01-25 23:24:01 -0800 |
| commit | 5509cdd4c8332c53151e10ba5bdbe0684af1c05b (patch) | |
| tree | 15f4a7e8f83e0d249918bbce4198160fb2c5360f /src/test/scala/examples/ImplicitStateVendingMachine.scala | |
| parent | 4f5ec211cb59f9da37dbe91d0dfcb93c4d3d84c9 (diff) | |
WireDefault instead of WireInit, keep WireInit around (#986)
Diffstat (limited to 'src/test/scala/examples/ImplicitStateVendingMachine.scala')
| -rw-r--r-- | src/test/scala/examples/ImplicitStateVendingMachine.scala | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/test/scala/examples/ImplicitStateVendingMachine.scala b/src/test/scala/examples/ImplicitStateVendingMachine.scala index 92f57854..29d04d92 100644 --- a/src/test/scala/examples/ImplicitStateVendingMachine.scala +++ b/src/test/scala/examples/ImplicitStateVendingMachine.scala @@ -9,7 +9,7 @@ import chisel3._ class ImplicitStateVendingMachine extends SimpleVendingMachine { // We let the value of nickel be 1 and dime be 2 for efficiency reasons val value = RegInit(0.asUInt(3.W)) - val incValue = WireInit(0.asUInt(3.W)) + val incValue = WireDefault(0.asUInt(3.W)) val doDispense = value >= 4.U // 4 * nickel as 1 == $0.20 when (doDispense) { |