Remove dynamic indexing for now

We can sometimes shim with other workarounds like VecInit or manually
creating a mux

1 files changed, 10 insertions, 60 deletions

diff --git a/src/test/scala/chiselTests/MixedVecSpec.scala b/src/test/scala/chiselTests/MixedVecSpec.scala
index 36798e5b..64754d2f 100644
--- a/src/test/scala/chiselTests/MixedVecSpec.scala
+++ b/src/test/scala/chiselTests/MixedVecSpec.scala
@@ -74,20 +74,18 @@ class MixedVecZeroEntryTester extends BasicTester {
   stop()
 }
 
-class MixedVecUIntDynamicIndexTester(n: Int) extends BasicTester {
-  val wire = Wire(MixedVec(Seq.fill(n) { UInt() }))
-
-  val (cycle, done) = Counter(true.B, n)
+class MixedVecUIntDynamicIndexTester extends BasicTester {
+  val wire = Wire(MixedVec(Seq(UInt(8.W), UInt(16.W), UInt(4.W), UInt(7.W))))
+  val n = wire.length
 
   for (i <- 0 until n) {
-    when(cycle === i.U) {
-      wire(i) := i.U
-    } .otherwise {
-      wire(i) := DontCare
-    }
+    wire(i) := i.U
   }
 
-  assert(wire(cycle) === cycle)
+  val vecWire = VecInit(wire.toSeq)
+
+  val (cycle, done) = Counter(true.B, n)
+  assert(vecWire(cycle) === cycle)
 
   when (done) { stop() }
 }
@@ -102,50 +100,6 @@ class MixedVecSmallTestBundle extends Bundle {
   val y = UInt(3.W)
 }
 
-class MixedVecDynamicIndexTester extends BasicTester {
-  val wire = Wire(MixedVec(Seq(UInt(8.W), SInt(8.W), Bool(), new MixedVecTestBundle, new MixedVecSmallTestBundle)))
-
-  val val0 = 163.U(8.W)
-  val val1 = (-96).S(8.W)
-  val val2 = true.B
-  val val3 = 126.U(8.W)
-  val val4 = 6.U(3.W)
-
-  wire(0) := val0
-  wire(1) := val1
-  wire(2) := val2
-  val wire3 = wire(3).asInstanceOf[MixedVecTestBundle]
-  wire3.x := val3
-  wire3.y := val3
-  val wire4 = wire(4).asInstanceOf[MixedVecSmallTestBundle]
-  wire4.x := val4
-  wire4.y := val4
-
-  val (cycle, done) = Counter(true.B, wire.length)
-  val currentData = wire(cycle)
-
-  when(cycle === 0.U) {
-    assert(currentData === val0)
-  } .elsewhen(cycle === 1.U) {
-    // We need to trim the width appropriately before calling asSInt
-    assert(currentData(7, 0).asSInt === val1)
-  } .elsewhen(cycle === 2.U) {
-    assert(currentData === val2.asUInt)
-  } .elsewhen(cycle === 3.U) {
-    val currentBundle = currentData.asTypeOf(new MixedVecTestBundle)
-    assert(currentBundle.x === val3)
-    assert(currentBundle.y === val3)
-  } .otherwise {
-    val currentBundle = currentData.asTypeOf(new MixedVecSmallTestBundle)
-    assert(currentBundle.x === val4)
-    assert(currentBundle.y === val4)
-  }
-
-  when(done) {
-    stop()
-  }
-}
-
 class MixedVecFromVecTester extends BasicTester {
   val wire = Wire(MixedVec(Vec(3, UInt(8.W))))
   wire := MixedVecWireInit(Seq(20.U, 40.U, 80.U))
@@ -264,12 +218,8 @@ class MixedVecSpec extends ChiselPropSpec {
     assertTesterPasses { new MixedVecZeroEntryTester }
   }
 
-  property("MixedVecs of UInts should be dynamically indexable") {
-    assertTesterPasses{ new MixedVecUIntDynamicIndexTester(4) }
-  }
-
-  property("MixedVecs in general should be dynamically indexable") {
-    assertTesterPasses{ new MixedVecDynamicIndexTester }
+  property("MixedVecs of UInts should be dynamically indexable (via VecInit)") {
+    assertTesterPasses{ new MixedVecUIntDynamicIndexTester }
   }
 
   property("MixedVecs should be creatable from Vecs") {