Support for inner classes, implicit parameter lists, supertypess

8 files changed, 107 insertions, 19 deletions

diff --git a/src/test/scala/chiselTests/AnalogIntegrationSpec.scala b/src/test/scala/chiselTests/AnalogIntegrationSpec.scala
index 952d3872..a3e6e643 100644
--- a/src/test/scala/chiselTests/AnalogIntegrationSpec.scala
+++ b/src/test/scala/chiselTests/AnalogIntegrationSpec.scala
@@ -19,7 +19,7 @@ class AnalogBlackBoxPort extends Bundle {
 
 // This IO can be used for a single BlackBox or to group multiple
 // Has multiple ports for driving and checking but only one shared bus
-class AnalogBlackBoxIO(n: Int) extends Bundle {
+class AnalogBlackBoxIO(val n: Int) extends Bundle {
   require(n > 0)
   val bus = Analog(32.W)
   val port = Vec(n, new AnalogBlackBoxPort)
diff --git a/src/test/scala/chiselTests/AutoClonetypeSpec.scala b/src/test/scala/chiselTests/AutoClonetypeSpec.scala
index 93031c1c..1170ed12 100644
--- a/src/test/scala/chiselTests/AutoClonetypeSpec.scala
+++ b/src/test/scala/chiselTests/AutoClonetypeSpec.scala
@@ -7,27 +7,108 @@ import chisel3._
 import chisel3.testers.BasicTester
 
 class BundleWithIntArg(val i: Int) extends Bundle {
-  val out = Output(UInt(i.W))
+  val out = UInt(i.W)
+}
+
+class BundleWithImplicit()(implicit val ii: Int) extends Bundle {
+  val out = UInt(ii.W)
+}
+
+class BundleWithArgAndImplicit(val i: Int)(implicit val ii: Int) extends Bundle {
+  val out1 = UInt(i.W)
+  val out2 = UInt(ii.W)
+}
+
+class BaseBundleVal(val i: Int) extends Bundle {
+  val inner = UInt(i.W)
+}
+class SubBundle(i: Int, val i2: Int) extends BaseBundleVal(i) {
+  val inner2 = UInt(i2.W)
+}
+class SubBundleInvalid(i: Int, val i2: Int) extends BaseBundleVal(i+1) {
+  val inner2 = UInt(i2.W)
+}
+
+class BaseBundleNonVal(i: Int) extends Bundle {
+  val inner = UInt(i.W)
+}
+class SubBundleVal(val i: Int, val i2: Int) extends BaseBundleNonVal(i) {
+  val inner2 = UInt(i2.W)
 }
 
 class ModuleWithInner extends Module {
   class InnerBundle(val i: Int) extends Bundle {
-    val out = Output(UInt(i.W))
+    val out = UInt(i.W)
   }
 
-  val io = IO(new InnerBundle(14))
-  io.out := 1.U
+  val io = IO(new Bundle{})
+
+  val myWire = Wire(new InnerBundle(14))
+  require(myWire.i == 14)
 }
 
 
 class AutoClonetypeSpec extends ChiselFlatSpec {
   "Bundles with Scala args" should "not need clonetype" in {
     elaborate { new Module {
-      val io = IO(new BundleWithIntArg(8))
-      io.out := 1.U
+      val io = IO(new Bundle{})
+
+      val myWire = Wire(new BundleWithIntArg(8))
+      assert(myWire.i == 8)
+    } }
+  }
+
+  "Bundles with Scala implicit args" should "not need clonetype" in {
+    elaborate { new Module {
+      val io = IO(new Bundle{})
+
+      implicit val implicitInt: Int = 4
+      val myWire = Wire(new BundleWithImplicit())
+
+      assert(myWire.ii == 4)
     } }
   }
 
+  "Bundles with Scala explicit and impicit args" should "not need clonetype" in {
+    elaborate { new Module {
+      val io = IO(new Bundle{})
+
+      implicit val implicitInt: Int = 4
+      val myWire = Wire(new BundleWithArgAndImplicit(8))
+
+      assert(myWire.i == 8)
+      assert(myWire.ii == 4)
+    } }
+  }
+
+  "Subtyped Bundles" should "not need clonetype" in {
+    elaborate { new Module {
+      val io = IO(new Bundle{})
+
+      val myWire = Wire(new SubBundle(8, 4))
+
+      assert(myWire.i == 8)
+      assert(myWire.i2 == 4)
+    } }
+    elaborate { new Module {
+      val io = IO(new Bundle{})
+
+      val myWire = Wire(new SubBundleVal(8, 4))
+
+      assert(myWire.i == 8)
+      assert(myWire.i2 == 4)
+    } }
+  }
+
+  "Subtyped Bundles that don't clone well" should "be caught" in {
+    a [ChiselException] should be thrownBy {
+      elaborate { new Module {
+        val io = IO(new Bundle{})
+        val myWire = Wire(new SubBundleInvalid(8, 4))
+      } }
+    }
+  }
+
   "Inner bundles with Scala args" should "not need clonetype" in {
     elaborate { new ModuleWithInner }
   }
diff --git a/src/test/scala/chiselTests/AutoNestedCloneSpec.scala b/src/test/scala/chiselTests/AutoNestedCloneSpec.scala
index 178cb142..d3977213 100644
--- a/src/test/scala/chiselTests/AutoNestedCloneSpec.scala
+++ b/src/test/scala/chiselTests/AutoNestedCloneSpec.scala
@@ -9,7 +9,7 @@ class AutoNestedCloneSpec extends ChiselFlatSpec with Matchers {
   behavior of "autoCloneType of inner Bundle in Chisel3"
 
   it should "clone a doubly-nested inner bundle successfully" in {
-    elaborate { 
+    elaborate {
       class Outer(val w: Int) extends Module {
         class Middle(val w: Int) {
           class InnerIOType extends Bundle {
@@ -17,16 +17,18 @@ class AutoNestedCloneSpec extends ChiselFlatSpec with Matchers {
           }
           def getIO = new InnerIOType
         }
-        val io = IO((new Middle(w)).getIO)
+        val io = IO(new Bundle {})
+        val myWire = Wire((new Middle(w)).getIO) 
       }
       new Outer(2)
     }
   }
 
   it should "clone an anonymous inner bundle successfully" in {
-    elaborate { 
+    elaborate {
       class TestTop(val w: Int) extends Module {
-        val io = IO(new Bundle{ val a = UInt(w.W) })
+        val io = IO(new Bundle {})
+        val myWire = Wire(new Bundle{ val a = UInt(w.W) })
       }
       new TestTop(2)
     }
@@ -63,10 +65,11 @@ class AutoNestedCloneSpec extends ChiselFlatSpec with Matchers {
             val in = Input(UInt(w.W))
           }
         }
-        val io = IO((new Middle(w)).getIO)
+        val io = IO(new Bundle {})
+        val myWire = Wire((new Middle(w)).getIO)
       }
       new Outer(2)
     }
-  }).getMessage should include("non-trivial inner Bundle class")
+  }).getMessage should include("Unable to determine instance")
 
 }
diff --git a/src/test/scala/chiselTests/CompatibilityInteroperabilitySpec.scala b/src/test/scala/chiselTests/CompatibilityInteroperabilitySpec.scala
index 457f26de..95dc87c1 100644
--- a/src/test/scala/chiselTests/CompatibilityInteroperabilitySpec.scala
+++ b/src/test/scala/chiselTests/CompatibilityInteroperabilitySpec.scala
@@ -12,6 +12,8 @@ object CompatibilityComponents {
   class ChiselBundle extends Bundle {
     val a = UInt(width = 32)
     val b = UInt(width = 32).flip
+
+    override def cloneType = (new ChiselBundle).asInstanceOf[this.type]
   }
   class ChiselRecord extends Record {
     val elements = ListMap("a" -> UInt(width = 32), "b" -> UInt(width = 32).flip)
@@ -46,6 +48,8 @@ object Chisel3Components {
   class Chisel3Bundle extends Bundle {
     val a = Output(UInt(32.W))
     val b = Input(UInt(32.W))
+
+    override def cloneType = (new Chisel3Bundle).asInstanceOf[this.type]
   }
 
   class Chisel3Record extends Record {
diff --git a/src/test/scala/chiselTests/MissingCloneBindingExceptionSpec.scala b/src/test/scala/chiselTests/MissingCloneBindingExceptionSpec.scala
index 43f2b0fd..fc9346a0 100644
--- a/src/test/scala/chiselTests/MissingCloneBindingExceptionSpec.scala
+++ b/src/test/scala/chiselTests/MissingCloneBindingExceptionSpec.scala
@@ -28,7 +28,7 @@ class MissingCloneBindingExceptionSpec extends ChiselFlatSpec with Matchers {
     }
 
     elaborate(new TestTop)
-  }).getMessage should include("needs cloneType method")
+  }).getMessage should include("make all parameters immutable")
 
   behavior of "missing cloneType in Chisel2"
   ( the[ChiselException] thrownBy {
@@ -53,5 +53,5 @@ class MissingCloneBindingExceptionSpec extends ChiselFlatSpec with Matchers {
     }
 
     elaborate(new TestTop)
-  }).getMessage should include("needs cloneType method")
+  }).getMessage should include("make all parameters immutable")
 }
diff --git a/src/test/scala/chiselTests/NamingAnnotationTest.scala b/src/test/scala/chiselTests/NamingAnnotationTest.scala
index 699dc0fb..a7b9b75c 100644
--- a/src/test/scala/chiselTests/NamingAnnotationTest.scala
+++ b/src/test/scala/chiselTests/NamingAnnotationTest.scala
@@ -12,7 +12,7 @@ import chisel3.testers.BasicTester
 import scala.collection.mutable.ListBuffer
 
 trait NamedModuleTester extends Module {
-  val io = IO(new Bundle())  // Named module testers don't need IO
+  val io = IO(new Bundle() {})  // Named module testers don't need IO
 
   val expectedNameMap = ListBuffer[(InstanceId, String)]()
   val expectedModuleNameMap = ListBuffer[(Module, String)]()
diff --git a/src/test/scala/chiselTests/OptionBundle.scala b/src/test/scala/chiselTests/OptionBundle.scala
index 2ac661ea..03b08385 100644
--- a/src/test/scala/chiselTests/OptionBundle.scala
+++ b/src/test/scala/chiselTests/OptionBundle.scala
@@ -6,7 +6,7 @@ import org.scalatest._
 import chisel3._
 import chisel3.testers.BasicTester
 
-class OptionBundle(hasIn: Boolean) extends Bundle {
+class OptionBundle(val hasIn: Boolean) extends Bundle {
   val in = if (hasIn) {
     Some(Input(Bool()))
   } else {
@@ -15,7 +15,7 @@ class OptionBundle(hasIn: Boolean) extends Bundle {
   val out = Output(Bool())
 }
 
-class OptionBundleModule(hasIn: Boolean) extends Module {
+class OptionBundleModule(val hasIn: Boolean) extends Module {
   val io = IO(new OptionBundle(hasIn))
   if (hasIn) {
     io.out := io.in.get
diff --git a/src/test/scala/chiselTests/VectorPacketIO.scala b/src/test/scala/chiselTests/VectorPacketIO.scala
index 7745db57..4a8c6f78 100644
--- a/src/test/scala/chiselTests/VectorPacketIO.scala
+++ b/src/test/scala/chiselTests/VectorPacketIO.scala
@@ -27,7 +27,7 @@ class Packet extends Bundle {
   * lines also.
   * The problem does not occur if the Vec is taken out
   */
-class VectorPacketIO(n: Int) extends Bundle {
+class VectorPacketIO(val n: Int) extends Bundle {
   val ins  = Vec(n, chisel3.util.DeqIO(new Packet()))
   val outs = Vec(n, chisel3.util.EnqIO(new Packet()))
 }