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authorAdam Izraelevitz2020-09-14 10:17:49 -0700
committerGitHub2020-09-14 17:17:49 +0000
commit69e27b2fd9e02d4e3a024eec0cafce5b4b46c10a (patch)
treeda496ac9fcc2ae6d02560edf9cf10d10e9b3964b /src/test/scala/chiselTests/naming
parent3b5fda0c604b393833769250ade9f7d13ca4e5e7 (diff)
Documentation and minor plugin changes. (#1573)
* Added documentation. Bugfix in plugin. Moved plugin APIs to separate package * Revert reg naming behavior (omit underscore) * Added documentation and a test * Addressed reviewer feedback.
Diffstat (limited to 'src/test/scala/chiselTests/naming')
-rw-r--r--src/test/scala/chiselTests/naming/NamePluginSpec.scala18
1 files changed, 18 insertions, 0 deletions
diff --git a/src/test/scala/chiselTests/naming/NamePluginSpec.scala b/src/test/scala/chiselTests/naming/NamePluginSpec.scala
index fc90264d..946b557a 100644
--- a/src/test/scala/chiselTests/naming/NamePluginSpec.scala
+++ b/src/test/scala/chiselTests/naming/NamePluginSpec.scala
@@ -203,5 +203,23 @@ class NamePluginSpec extends ChiselFlatSpec with Utils {
y
}
}
+
+ "Nested val declarations" should "all be named" in {
+ class Test extends MultiIOModule {
+ {
+ val a = {
+ val b = {
+ val c = Wire(UInt(3.W))
+ Wire(UInt(3.W))
+ }
+ Wire(UInt(3.W))
+ }
+ }
+ }
+
+ aspectTest(() => new Test) {
+ top: Test => Select.wires(top).map(_.instanceName) should be (List("a_b_c", "a_b", "a"))
+ }
+ }
}