Merge branch '3.5.x' into 3.5-release

1 files changed, 19 insertions, 0 deletions

diff --git a/src/test/scala/chiselTests/experimental/hierarchy/Examples.scala b/src/test/scala/chiselTests/experimental/hierarchy/Examples.scala
index 5b78b7cc..fa26cbde 100644
--- a/src/test/scala/chiselTests/experimental/hierarchy/Examples.scala
+++ b/src/test/scala/chiselTests/experimental/hierarchy/Examples.scala
@@ -47,6 +47,13 @@ object Examples {
     val addOneDef = Seq.fill(3)(Definition(new AddOne))
     out := in + 1.U
   }
+  @instantiable
+  class AddOneBlackBox extends BlackBox {
+    @public val io = IO(new Bundle {
+      val in = Input(UInt(32.W))
+      val out = Output(UInt(32.W))
+    })
+  }
 
   @instantiable
   class AddTwo extends Module {
@@ -200,6 +207,12 @@ object Examples {
     @public val y: Either[Bool, UInt] = Left(Wire(Bool()).suggestName("y"))
   }
   @instantiable
+  class HasTuple2() extends Module {
+    val x = Wire(UInt(3.W))
+    val y = Wire(Bool())
+    @public val xy = (x, y)
+  }
+  @instantiable
   class HasVec() extends Module {
     @public val x = VecInit(1.U, 2.U, 3.U)
   }
@@ -252,4 +265,10 @@ object Examples {
     val i10 = Instance(tpDef1)
     val i11 = Instance(tpDef1)
   }
+
+  @instantiable
+  class HasMems() extends Module {
+    @public val mem = Mem(8, UInt(32.W))
+    @public val syncReadMem = SyncReadMem(8, UInt(32.W))
+  }
 }