Merge branch '3.5.x' into 3.5-release

1 files changed, 5 insertions, 5 deletions

diff --git a/src/test/scala/chiselTests/VerificationSpec.scala b/src/test/scala/chiselTests/VerificationSpec.scala
index 95b0ffe6..32cee9e3 100644
--- a/src/test/scala/chiselTests/VerificationSpec.scala
+++ b/src/test/scala/chiselTests/VerificationSpec.scala
@@ -105,9 +105,9 @@ class VerificationSpec extends ChiselPropSpec with Matchers {
     val firLines = scala.io.Source.fromFile(firFile).getLines.toList
 
     // check that verification components have expected names
-    exactly(1, firLines) should include("cover(clock, _T, UInt<1>(\"h1\"), \"\") : cov")
-    exactly(1, firLines) should include("assume(clock, _T_3, UInt<1>(\"h1\"), \"\") : assm")
-    exactly(1, firLines) should include("assert(clock, _T_7, UInt<1>(\"h1\"), \"\") : asst")
+    (exactly(1, firLines) should include).regex("^\\s*cover\\(.*\\) : cov")
+    (exactly(1, firLines) should include).regex("^\\s*assume\\(.*\\) : assm")
+    (exactly(1, firLines) should include).regex("^\\s*assert\\(.*\\) : asst")
   }
 
   property("annotation of verification constructs with suggested name should work") {
@@ -150,7 +150,7 @@ class VerificationSpec extends ChiselPropSpec with Matchers {
     val firLines = scala.io.Source.fromFile(firFile).getLines.toList
 
     // check that verification components have expected names
-    exactly(1, firLines) should include("assert(clock, _T, UInt<1>(\"h1\"), \"\") : hello")
-    exactly(1, firLines) should include("assume(clock, _T_4, UInt<1>(\"h1\"), \"\") : howdy")
+    (exactly(1, firLines) should include).regex("^\\s*assert\\(.*\\) : hello")
+    (exactly(1, firLines) should include).regex("^\\s*assume\\(.*\\) : howdy")
   }
 }