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authorRichard Lin2018-01-02 13:51:36 -0800
committerGitHub2018-01-02 13:51:36 -0800
commit678df42aa6bf2f4715be2d051c3c29f058948d0c (patch)
tree0b3fb00565e1c442abd7885d490cd4324f02d3fe /src/test/scala/chiselTests/VectorPacketIO.scala
parentcb7fcd2b18135230dc40f3c7bb98685e7ffde9d5 (diff)
parentade792ee7c5bb718f738f5e4c3886b2e87c68756 (diff)
Merge pull request #723 from freechipsproject/autoclonetype
Auto clone type 🦆
Diffstat (limited to 'src/test/scala/chiselTests/VectorPacketIO.scala')
-rw-r--r--src/test/scala/chiselTests/VectorPacketIO.scala2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/test/scala/chiselTests/VectorPacketIO.scala b/src/test/scala/chiselTests/VectorPacketIO.scala
index 7745db57..4a8c6f78 100644
--- a/src/test/scala/chiselTests/VectorPacketIO.scala
+++ b/src/test/scala/chiselTests/VectorPacketIO.scala
@@ -27,7 +27,7 @@ class Packet extends Bundle {
* lines also.
* The problem does not occur if the Vec is taken out
*/
-class VectorPacketIO(n: Int) extends Bundle {
+class VectorPacketIO(val n: Int) extends Bundle {
val ins = Vec(n, chisel3.util.DeqIO(new Packet()))
val outs = Vec(n, chisel3.util.EnqIO(new Packet()))
}