diff options
| author | Jim Lawson | 2016-07-20 17:08:55 -0700 |
|---|---|---|
| committer | Jim Lawson | 2016-07-20 17:08:55 -0700 |
| commit | 1fa57cc3f76bc3e5de7e6b943abe70becdcb2295 (patch) | |
| tree | 1cea032150aae31fdf7cb995b26724be4b0ceb38 /src/test/scala/chiselTests/VectorPacketIO.scala | |
| parent | 2dce378deda1cc33833eb378c89a1c5415817bae (diff) | |
More literal/width rangling.
Diffstat (limited to 'src/test/scala/chiselTests/VectorPacketIO.scala')
| -rw-r--r-- | src/test/scala/chiselTests/VectorPacketIO.scala | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/test/scala/chiselTests/VectorPacketIO.scala b/src/test/scala/chiselTests/VectorPacketIO.scala index 081990ad..6e1d267d 100644 --- a/src/test/scala/chiselTests/VectorPacketIO.scala +++ b/src/test/scala/chiselTests/VectorPacketIO.scala @@ -19,7 +19,7 @@ import chisel3.util._ * IMPORTANT: The canonical way to initialize a decoupled inteface is still being debated. */ class Packet extends Bundle { - val header = UInt(width = 1) + val header = UInt.width(1) } /** |