Merge branch 'master' into exceptionfix

1 files changed, 9 insertions, 9 deletions

diff --git a/src/test/scala/chiselTests/Vec.scala b/src/test/scala/chiselTests/Vec.scala
index 0d5a2188..4822d892 100644
--- a/src/test/scala/chiselTests/Vec.scala
+++ b/src/test/scala/chiselTests/Vec.scala
@@ -11,17 +11,17 @@ import chisel3.util._
 //import chisel3.core.ExplicitCompileOptions.Strict
 
 class ValueTester(w: Int, values: List[Int]) extends BasicTester {
-  val v = Vec(values.map(UInt(_, width = w))) // TODO: does this need a Wire? Why no error?
+  val v = Vec(values.map(_.asUInt(w.W))) // TODO: does this need a Wire? Why no error?
   for ((a,b) <- v.zip(values)) {
-    assert(a === UInt(b))
+    assert(a === b.asUInt)
   }
   stop()
 }
 
 class TabulateTester(n: Int) extends BasicTester {
-  val v = Vec(Range(0, n).map(i => UInt(i * 2)))
-  val x = Vec(Array.tabulate(n){ i => UInt(i * 2) })
-  val u = Vec.tabulate(n)(i => UInt(i*2))
+  val v = Vec(Range(0, n).map(i => (i*2).asUInt))
+  val x = Vec(Array.tabulate(n){ i => (i*2).asUInt })
+  val u = Vec.tabulate(n)(i => (i*2).asUInt)
 
   assert(v.asUInt() === x.asUInt())
   assert(v.asUInt() === u.asUInt())
@@ -31,12 +31,12 @@ class TabulateTester(n: Int) extends BasicTester {
 }
 
 class ShiftRegisterTester(n: Int) extends BasicTester {
-  val (cnt, wrap) = Counter(Bool(true), n*2)
-  val shifter = Reg(Vec(n, UInt.width(log2Up(n))))
+  val (cnt, wrap) = Counter(true.B, n*2)
+  val shifter = Reg(Vec(n, UInt(log2Up(n).W)))
   (shifter, shifter drop 1).zipped.foreach(_ := _)
   shifter(n-1) := cnt
-  when (cnt >= UInt(n)) {
-    val expected = cnt - UInt(n)
+  when (cnt >= n.asUInt) {
+    val expected = cnt - n.asUInt
     assert(shifter(0) === expected)
   }
   when (wrap) {