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| author | chick | 2016-02-22 12:47:05 -0800 |
|---|---|---|
| committer | chick | 2016-02-22 12:47:05 -0800 |
| commit | d87db04ff7a5cb12443529861558f1850448170b (patch) | |
| tree | 3421165c0a26ca559d17ae9d4e733d22cba6dc37 /src/test/scala/chiselTests/TesterDriverSpec.scala | |
| parent | a9355ba3784e3c5ae611f096a48b4ee5c78464ad (diff) | |
Fixed improper apostrophe in it's in TesterDriverSpec comments
Diffstat (limited to 'src/test/scala/chiselTests/TesterDriverSpec.scala')
| -rw-r--r-- | src/test/scala/chiselTests/TesterDriverSpec.scala | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/test/scala/chiselTests/TesterDriverSpec.scala b/src/test/scala/chiselTests/TesterDriverSpec.scala index dfdd07cc..3c57daae 100644 --- a/src/test/scala/chiselTests/TesterDriverSpec.scala +++ b/src/test/scala/chiselTests/TesterDriverSpec.scala @@ -22,7 +22,7 @@ class FinishTester extends BasicTester { val test_wire = Wire(UInt(1, width = test_wire_width)) // though we just set test_wire to 1, the assert below will pass because - // the finish will change it's value + // the finish will change its value assert(test_wire === UInt(test_wire_override_value)) /** In finish we use last connect semantics to alter the test_wire in the circuit |